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<a href="#nested-classes">Data Structures</a> &#124;
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Data Structures</h2></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dsi___short_packet.html">XDsi_ShortPacket</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">This typedef contains the Short Packet information from the Generic Short Packet Register.  <a href="struct_x_dsi___short_packet.html#details">More...</a><br /></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dsi___video_timing.html">XDsi_VideoTiming</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Video timing structure.  <a href="struct_x_dsi___video_timing.html#details">More...</a><br /></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dsi___config.html">XDsi_Config</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">The configuration structure for DSI Controller This structure passes the hardware building information to the driver.  <a href="struct_x_dsi___config.html#details">More...</a><br /></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dsi___config_parameters.html">XDsi_ConfigParameters</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">The structure to read DSI controller &amp; Configurable Parameters.  <a href="struct_x_dsi___config_parameters.html#details">More...</a><br /></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dsi.html">XDsi</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">The <a class="el" href="struct_x_dsi.html" title="The XDsi driver instance data. ">XDsi</a> driver instance data.  <a href="struct_x_dsi.html#details">More...</a><br /></td></tr>
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Macros</h2></td></tr>
<tr class="memitem:gafd5cde340aa4524c2bab0f5c570bf542"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#gafd5cde340aa4524c2bab0f5c570bf542">XDSI_MAX_LANES</a>&#160;&#160;&#160;4</td></tr>
<tr class="memdesc:gafd5cde340aa4524c2bab0f5c570bf542"><td class="mdescLeft">&#160;</td><td class="mdescRight">Max Lanes supported by DSI.  <a href="#gafd5cde340aa4524c2bab0f5c570bf542">More...</a><br /></td></tr>
<tr class="separator:gafd5cde340aa4524c2bab0f5c570bf542"><td class="memSeparator" colspan="2">&#160;</td></tr>
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Typedefs</h2></td></tr>
<tr class="memitem:gadb49962ec03e915633d604c392c5bb3e"><td class="memItemLeft" align="right" valign="top">typedef void(*&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#gadb49962ec03e915633d604c392c5bb3e">XDsi_Callback</a>) (void *CallbackRef, u32 Mask)</td></tr>
<tr class="memdesc:gadb49962ec03e915633d604c392c5bb3e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Callback type for all interrupts defined.  <a href="#gadb49962ec03e915633d604c392c5bb3e">More...</a><br /></td></tr>
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Enumerations</h2></td></tr>
<tr class="memitem:ga7931c0f0d26ec1b2bc681f2efe0cf62f"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga7931c0f0d26ec1b2bc681f2efe0cf62f">XDsi_VideoMode</a> <tr class="memdesc:ga7931c0f0d26ec1b2bc681f2efe0cf62f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Video Timing Mode by default Non-burst mode with Sync Events.  <a href="group__dsi__v1__0.html#ga7931c0f0d26ec1b2bc681f2efe0cf62f">More...</a><br /></td></tr>
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Functions</h2></td></tr>
<tr class="memitem:ga7ee417c05f7b0171f4b5ab732fd92054"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga7ee417c05f7b0171f4b5ab732fd92054">XDsi_CfgInitialize</a> (<a class="el" href="struct_x_dsi.html">XDsi</a> *InstancePtr, <a class="el" href="struct_x_dsi___config.html">XDsi_Config</a> *CfgPtr, UINTPTR EffectiveAddr)</td></tr>
<tr class="memdesc:ga7ee417c05f7b0171f4b5ab732fd92054"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize the <a class="el" href="struct_x_dsi.html" title="The XDsi driver instance data. ">XDsi</a> instance provided by the caller based on the given Config structure.  <a href="#ga7ee417c05f7b0171f4b5ab732fd92054">More...</a><br /></td></tr>
<tr class="separator:ga7ee417c05f7b0171f4b5ab732fd92054"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2294e22112b6a7aa5ed1c2714f674f72"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga2294e22112b6a7aa5ed1c2714f674f72">XDsi_Reset</a> (<a class="el" href="struct_x_dsi.html">XDsi</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga2294e22112b6a7aa5ed1c2714f674f72"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will do a reset of the IP.  <a href="#ga2294e22112b6a7aa5ed1c2714f674f72">More...</a><br /></td></tr>
<tr class="separator:ga2294e22112b6a7aa5ed1c2714f674f72"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga342762351ea237fa26e737d13bcbfcac"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga342762351ea237fa26e737d13bcbfcac">XDsi_DefaultConfigure</a> (<a class="el" href="struct_x_dsi.html">XDsi</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga342762351ea237fa26e737d13bcbfcac"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will configure protocol reg with video mode, Blank packet mode, Blank packet Type, End of Transmisstion packet.  <a href="#ga342762351ea237fa26e737d13bcbfcac">More...</a><br /></td></tr>
<tr class="separator:ga342762351ea237fa26e737d13bcbfcac"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga96a76baa5b141b35af0d7cc697ade584"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga96a76baa5b141b35af0d7cc697ade584">XDsi_Activate</a> (<a class="el" href="struct_x_dsi.html">XDsi</a> *InstancePtr, XDsi_Selection Flag)</td></tr>
<tr class="memdesc:ga96a76baa5b141b35af0d7cc697ade584"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will enable/disable the IP Core to start processing.  <a href="#ga96a76baa5b141b35af0d7cc697ade584">More...</a><br /></td></tr>
<tr class="separator:ga96a76baa5b141b35af0d7cc697ade584"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab2cf4f33eff4d4e77d083335025c08f9"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#gab2cf4f33eff4d4e77d083335025c08f9">XDsi_SendShortPacket</a> (<a class="el" href="struct_x_dsi.html">XDsi</a> *InstancePtr, <a class="el" href="struct_x_dsi___short_packet.html">XDsi_ShortPacket</a> *ShortPacket)</td></tr>
<tr class="memdesc:gab2cf4f33eff4d4e77d083335025c08f9"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will send the short packet to DSI controller Generic Short Packet Register.  <a href="#gab2cf4f33eff4d4e77d083335025c08f9">More...</a><br /></td></tr>
<tr class="separator:gab2cf4f33eff4d4e77d083335025c08f9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaef3bbf8bd7a39e7154eb3ce1129fdda7"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#gaef3bbf8bd7a39e7154eb3ce1129fdda7">XDsi_GetConfigParams</a> (<a class="el" href="struct_x_dsi.html">XDsi</a> *InstancePtr, <a class="el" href="struct_x_dsi___config_parameters.html">XDsi_ConfigParameters</a> *ConfigInfo)</td></tr>
<tr class="memdesc:gaef3bbf8bd7a39e7154eb3ce1129fdda7"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will get the information from the GUI settings and other protocol control register values like video mode, Blank packet type, Packet Mode, EOTP value.  <a href="#gaef3bbf8bd7a39e7154eb3ce1129fdda7">More...</a><br /></td></tr>
<tr class="separator:gaef3bbf8bd7a39e7154eb3ce1129fdda7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad26d8689133a90687735f528ff96b97d"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#gad26d8689133a90687735f528ff96b97d">XDsi_SetVideoInterfaceTiming</a> (<a class="el" href="struct_x_dsi.html">XDsi</a> *InstancePtr, <a class="el" href="group__dsi__v1__0.html#ga7931c0f0d26ec1b2bc681f2efe0cf62f">XDsi_VideoMode</a> VideoMode, XVidC_VideoMode Resolution, u16 BurstPacketSize)</td></tr>
<tr class="memdesc:gad26d8689133a90687735f528ff96b97d"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function Set Timning mode and Resolution as per that it populate with Peripheral Timing Parameters from the video common library.  <a href="#gad26d8689133a90687735f528ff96b97d">More...</a><br /></td></tr>
<tr class="separator:gad26d8689133a90687735f528ff96b97d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab9519a80289d049534bfbafefdc41c4e"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#gab9519a80289d049534bfbafefdc41c4e">XDsi_SetCustomVideoInterfaceTiming</a> (<a class="el" href="struct_x_dsi.html">XDsi</a> *InstancePtr, <a class="el" href="group__dsi__v1__0.html#ga7931c0f0d26ec1b2bc681f2efe0cf62f">XDsi_VideoMode</a> VideoMode, <a class="el" href="struct_x_dsi___video_timing.html">XDsi_VideoTiming</a> *Timing)</td></tr>
<tr class="memdesc:gab9519a80289d049534bfbafefdc41c4e"><td class="mdescLeft">&#160;</td><td class="mdescRight">XDsi_SetCustomVideoInterfaceTiming Set Timning mode and Resolution as per user input.  <a href="#gab9519a80289d049534bfbafefdc41c4e">More...</a><br /></td></tr>
<tr class="separator:gab9519a80289d049534bfbafefdc41c4e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga51ee9407c1cb984a36e413b3bdb4f9c6"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_dsi___config.html">XDsi_Config</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga51ee9407c1cb984a36e413b3bdb4f9c6">XDsi_LookupConfig</a> (u32 DeviceId)</td></tr>
<tr class="memdesc:ga51ee9407c1cb984a36e413b3bdb4f9c6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Look up the hardware configuration for a device instance.  <a href="#ga51ee9407c1cb984a36e413b3bdb4f9c6">More...</a><br /></td></tr>
<tr class="separator:ga51ee9407c1cb984a36e413b3bdb4f9c6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga58a27f9f1a507863325082e43595b4b9"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga58a27f9f1a507863325082e43595b4b9">XDsi_SelfTest</a> (<a class="el" href="struct_x_dsi.html">XDsi</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga58a27f9f1a507863325082e43595b4b9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Runs a self-test on the driver/device.  <a href="#ga58a27f9f1a507863325082e43595b4b9">More...</a><br /></td></tr>
<tr class="separator:ga58a27f9f1a507863325082e43595b4b9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6e0292fd10d992deb9922469707d8ee7"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga6e0292fd10d992deb9922469707d8ee7">XDsi_SetCallback</a> (<a class="el" href="struct_x_dsi.html">XDsi</a> *InstancePtr, u32 HandleType, void *CallbackFunc, void *CallbackRef)</td></tr>
<tr class="memdesc:ga6e0292fd10d992deb9922469707d8ee7"><td class="mdescLeft">&#160;</td><td class="mdescRight">This routine installs an asynchronous callback function for the given HandlerType:  <a href="#ga6e0292fd10d992deb9922469707d8ee7">More...</a><br /></td></tr>
<tr class="separator:ga6e0292fd10d992deb9922469707d8ee7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5884ff79a940d84e55fdc7d9fc6be1f7"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga5884ff79a940d84e55fdc7d9fc6be1f7">XDsi_InterruptEnable</a> (<a class="el" href="struct_x_dsi.html">XDsi</a> *InstancePtr, u32 Mask)</td></tr>
<tr class="memdesc:ga5884ff79a940d84e55fdc7d9fc6be1f7"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will enable the interrupts present in the interrupt mask passed onto the function.  <a href="#ga5884ff79a940d84e55fdc7d9fc6be1f7">More...</a><br /></td></tr>
<tr class="separator:ga5884ff79a940d84e55fdc7d9fc6be1f7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac3e09d98f76b1f93db4ccbf0aa149aa5"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#gac3e09d98f76b1f93db4ccbf0aa149aa5">XDsi_InterruptDisable</a> (<a class="el" href="struct_x_dsi.html">XDsi</a> *InstancePtr, u32 Mask)</td></tr>
<tr class="memdesc:gac3e09d98f76b1f93db4ccbf0aa149aa5"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will disable the interrupts present in the interrupt mask passed onto the function.  <a href="#gac3e09d98f76b1f93db4ccbf0aa149aa5">More...</a><br /></td></tr>
<tr class="separator:gac3e09d98f76b1f93db4ccbf0aa149aa5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadbca55f4daff263f50034e122be0f001"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#gadbca55f4daff263f50034e122be0f001">XDsi_InterruptGetEnabled</a> (<a class="el" href="struct_x_dsi.html">XDsi</a> *InstancePtr)</td></tr>
<tr class="memdesc:gadbca55f4daff263f50034e122be0f001"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will get the interrupt mask set (enabled) in the DSI core.  <a href="#gadbca55f4daff263f50034e122be0f001">More...</a><br /></td></tr>
<tr class="separator:gadbca55f4daff263f50034e122be0f001"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga157c4d25d5f085edfb92b638e916a9cd"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga157c4d25d5f085edfb92b638e916a9cd">XDsi_InterruptGetStatus</a> (<a class="el" href="struct_x_dsi.html">XDsi</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga157c4d25d5f085edfb92b638e916a9cd"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will get the list of interrupts Invoked in the Interrupt Status Register of the DSI core.  <a href="#ga157c4d25d5f085edfb92b638e916a9cd">More...</a><br /></td></tr>
<tr class="separator:ga157c4d25d5f085edfb92b638e916a9cd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga11eb46d583cc851d5f7746856a7526e7"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga11eb46d583cc851d5f7746856a7526e7">XDsi_InterruptClear</a> (<a class="el" href="struct_x_dsi.html">XDsi</a> *InstancePtr, u32 Mask)</td></tr>
<tr class="memdesc:ga11eb46d583cc851d5f7746856a7526e7"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function will clear the interrupts set in the Interrupt Status Register of the DSI core.  <a href="#ga11eb46d583cc851d5f7746856a7526e7">More...</a><br /></td></tr>
<tr class="separator:ga11eb46d583cc851d5f7746856a7526e7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga925b34dea84b254a23db6570082c70fe"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga925b34dea84b254a23db6570082c70fe">XDsi_IntrHandler</a> (void *InstancePtr)</td></tr>
<tr class="memdesc:ga925b34dea84b254a23db6570082c70fe"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function is the interrupt handler for the DSI core.  <a href="#ga925b34dea84b254a23db6570082c70fe">More...</a><br /></td></tr>
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Device registers</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrpe905567f3f1e4630e21d2f8192509576"></a>Register sets of MIPI DSI Tx </p>
</td></tr>
<tr class="memitem:gaeed29761e55d0d1bbe7760684481a396"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#gaeed29761e55d0d1bbe7760684481a396">XDSI_CCR_OFFSET</a>&#160;&#160;&#160;0x00000000</td></tr>
<tr class="memdesc:gaeed29761e55d0d1bbe7760684481a396"><td class="mdescLeft">&#160;</td><td class="mdescRight">Core Configuration Register Offset.  <a href="#gaeed29761e55d0d1bbe7760684481a396">More...</a><br /></td></tr>
<tr class="separator:gaeed29761e55d0d1bbe7760684481a396"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5473a7e6d9e1d01a628e9626c9ade095"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga5473a7e6d9e1d01a628e9626c9ade095">XDSI_PCR_OFFSET</a>&#160;&#160;&#160;0x00000004</td></tr>
<tr class="memdesc:ga5473a7e6d9e1d01a628e9626c9ade095"><td class="mdescLeft">&#160;</td><td class="mdescRight">Protocol Configuration Register Offset.  <a href="#ga5473a7e6d9e1d01a628e9626c9ade095">More...</a><br /></td></tr>
<tr class="separator:ga5473a7e6d9e1d01a628e9626c9ade095"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadfe1bdf3d5aa5eec603cbafa671558f9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#gadfe1bdf3d5aa5eec603cbafa671558f9">XDSI_GIER_OFFSET</a>&#160;&#160;&#160;0x00000020</td></tr>
<tr class="memdesc:gadfe1bdf3d5aa5eec603cbafa671558f9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Global Interrupt Register Offset.  <a href="#gadfe1bdf3d5aa5eec603cbafa671558f9">More...</a><br /></td></tr>
<tr class="separator:gadfe1bdf3d5aa5eec603cbafa671558f9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacb8fcfb941281bff18fdf99901624f50"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#gacb8fcfb941281bff18fdf99901624f50">XDSI_ISR_OFFSET</a>&#160;&#160;&#160;0x00000024</td></tr>
<tr class="memdesc:gacb8fcfb941281bff18fdf99901624f50"><td class="mdescLeft">&#160;</td><td class="mdescRight">Interrupt Status Register.  <a href="#gacb8fcfb941281bff18fdf99901624f50">More...</a><br /></td></tr>
<tr class="separator:gacb8fcfb941281bff18fdf99901624f50"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7c9dabd1df1c9bbbe2f07d6886b0d08e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga7c9dabd1df1c9bbbe2f07d6886b0d08e">XDSI_IER_OFFSET</a>&#160;&#160;&#160;0x00000028</td></tr>
<tr class="memdesc:ga7c9dabd1df1c9bbbe2f07d6886b0d08e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Interrupt Enable Register.  <a href="#ga7c9dabd1df1c9bbbe2f07d6886b0d08e">More...</a><br /></td></tr>
<tr class="separator:ga7c9dabd1df1c9bbbe2f07d6886b0d08e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3eec9707c024afb9195332aebdf1af60"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga3eec9707c024afb9195332aebdf1af60">XDSI_STATUS_OFFSET</a>&#160;&#160;&#160;0x0000002C</td></tr>
<tr class="memdesc:ga3eec9707c024afb9195332aebdf1af60"><td class="mdescLeft">&#160;</td><td class="mdescRight">Status Register.  <a href="#ga3eec9707c024afb9195332aebdf1af60">More...</a><br /></td></tr>
<tr class="separator:ga3eec9707c024afb9195332aebdf1af60"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga756164904eef9cd3ebee25d94e973236"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga756164904eef9cd3ebee25d94e973236">XDSI_COMMAND_OFFSET</a>&#160;&#160;&#160;0x00000030</td></tr>
<tr class="memdesc:ga756164904eef9cd3ebee25d94e973236"><td class="mdescLeft">&#160;</td><td class="mdescRight">Packet Entry to command Queue.  <a href="#ga756164904eef9cd3ebee25d94e973236">More...</a><br /></td></tr>
<tr class="separator:ga756164904eef9cd3ebee25d94e973236"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac4a366cd8b489f2300cf007185d74c6a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#gac4a366cd8b489f2300cf007185d74c6a">XDSI_TIME1_OFFSET</a>&#160;&#160;&#160;0x00000050</td></tr>
<tr class="memdesc:gac4a366cd8b489f2300cf007185d74c6a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Time 1 Offset.  <a href="#gac4a366cd8b489f2300cf007185d74c6a">More...</a><br /></td></tr>
<tr class="separator:gac4a366cd8b489f2300cf007185d74c6a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae376be8a524a2ed0c89edbbd4ef69e12"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#gae376be8a524a2ed0c89edbbd4ef69e12">XDSI_TIME2_OFFSET</a>&#160;&#160;&#160;0x00000054</td></tr>
<tr class="memdesc:gae376be8a524a2ed0c89edbbd4ef69e12"><td class="mdescLeft">&#160;</td><td class="mdescRight">Time 2 Offset.  <a href="#gae376be8a524a2ed0c89edbbd4ef69e12">More...</a><br /></td></tr>
<tr class="separator:gae376be8a524a2ed0c89edbbd4ef69e12"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac71b3e52fa7de0307f51ab1f7131f732"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#gac71b3e52fa7de0307f51ab1f7131f732">XDSI_TIME3_OFFSET</a>&#160;&#160;&#160;0x00000058</td></tr>
<tr class="memdesc:gac71b3e52fa7de0307f51ab1f7131f732"><td class="mdescLeft">&#160;</td><td class="mdescRight">Time 3 Offset.  <a href="#gac71b3e52fa7de0307f51ab1f7131f732">More...</a><br /></td></tr>
<tr class="separator:gac71b3e52fa7de0307f51ab1f7131f732"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga85afc2d5f71f5a75f74c2011189e3dce"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga85afc2d5f71f5a75f74c2011189e3dce">XDSI_TIME4_OFFSET</a>&#160;&#160;&#160;0x0000005C</td></tr>
<tr class="memdesc:ga85afc2d5f71f5a75f74c2011189e3dce"><td class="mdescLeft">&#160;</td><td class="mdescRight">Time 4 Offset.  <a href="#ga85afc2d5f71f5a75f74c2011189e3dce">More...</a><br /></td></tr>
<tr class="separator:ga85afc2d5f71f5a75f74c2011189e3dce"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga59b5452a5b5f1076b77a024729ef910d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga59b5452a5b5f1076b77a024729ef910d">XDSI_LTIME_OFFSET</a>&#160;&#160;&#160;0x00000060</td></tr>
<tr class="memdesc:ga59b5452a5b5f1076b77a024729ef910d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Total Line Timing Offset.  <a href="#ga59b5452a5b5f1076b77a024729ef910d">More...</a><br /></td></tr>
<tr class="separator:ga59b5452a5b5f1076b77a024729ef910d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac838501f9d54d130a9b3599b7b9117f8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#gac838501f9d54d130a9b3599b7b9117f8">XDSI_BLLP_TIME_OFFSET</a>&#160;&#160;&#160;0x00000064</td></tr>
<tr class="memdesc:gac838501f9d54d130a9b3599b7b9117f8"><td class="mdescLeft">&#160;</td><td class="mdescRight">BLLP Time duration Offset.  <a href="#gac838501f9d54d130a9b3599b7b9117f8">More...</a><br /></td></tr>
<tr class="separator:gac838501f9d54d130a9b3599b7b9117f8"><td class="memSeparator" colspan="2">&#160;</td></tr>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Core configuration register masks and shifts</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrp2c77926d23b8ae3c5f5154cd6ea6d9af"></a>This register is used for the enabling/disabling and resetting the core of DSI Tx Controller </p>
</td></tr>
<tr class="memitem:ga1d0c1ae0c0d9924987be74d0c7000265"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga1d0c1ae0c0d9924987be74d0c7000265">XDSI_CCR_CRREADY_MASK</a>&#160;&#160;&#160;0x00000004</td></tr>
<tr class="memdesc:ga1d0c1ae0c0d9924987be74d0c7000265"><td class="mdescLeft">&#160;</td><td class="mdescRight">Controller Ready bit Mask.  <a href="#ga1d0c1ae0c0d9924987be74d0c7000265">More...</a><br /></td></tr>
<tr class="separator:ga1d0c1ae0c0d9924987be74d0c7000265"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa2a45eef681d96a7a2d4e36531589db8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#gaa2a45eef681d96a7a2d4e36531589db8">XDSI_CCR_SOFTRESET_MASK</a>&#160;&#160;&#160;0x00000002</td></tr>
<tr class="memdesc:gaa2a45eef681d96a7a2d4e36531589db8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Soft Reset core bit Mask.  <a href="#gaa2a45eef681d96a7a2d4e36531589db8">More...</a><br /></td></tr>
<tr class="separator:gaa2a45eef681d96a7a2d4e36531589db8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga27e3fe15791633934c2362977de80c5d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga27e3fe15791633934c2362977de80c5d">XDSI_CCR_COREENB_MASK</a>&#160;&#160;&#160;0x00000001</td></tr>
<tr class="memdesc:ga27e3fe15791633934c2362977de80c5d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable/Disable core Mask.  <a href="#ga27e3fe15791633934c2362977de80c5d">More...</a><br /></td></tr>
<tr class="separator:ga27e3fe15791633934c2362977de80c5d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0933ad53dc42710435be79ad4316720d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga0933ad53dc42710435be79ad4316720d">XDSI_CCR_CRREADY_SHIFT</a>&#160;&#160;&#160;2</td></tr>
<tr class="memdesc:ga0933ad53dc42710435be79ad4316720d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift for Controller Ready.  <a href="#ga0933ad53dc42710435be79ad4316720d">More...</a><br /></td></tr>
<tr class="separator:ga0933ad53dc42710435be79ad4316720d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1f2d881102a20feb2fa29e29018eaa53"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga1f2d881102a20feb2fa29e29018eaa53">XDSI_CCR_SOFTRESET_SHIFT</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:ga1f2d881102a20feb2fa29e29018eaa53"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift for Soft reset.  <a href="#ga1f2d881102a20feb2fa29e29018eaa53">More...</a><br /></td></tr>
<tr class="separator:ga1f2d881102a20feb2fa29e29018eaa53"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabebe3e1ad24a94fe95a71eaecb51d037"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#gabebe3e1ad24a94fe95a71eaecb51d037">XDSI_CCR_COREENB_SHIFT</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:gabebe3e1ad24a94fe95a71eaecb51d037"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift for Core Enable.  <a href="#gabebe3e1ad24a94fe95a71eaecb51d037">More...</a><br /></td></tr>
<tr class="separator:gabebe3e1ad24a94fe95a71eaecb51d037"><td class="memSeparator" colspan="2">&#160;</td></tr>
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Bitmasks and shifts of Protocol control register</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrpb72629cf182b17cb6ed2a6a31d00ecf0"></a>This register reports the number of lanes configured during core generation and number of lanes actively used. </p>
</td></tr>
<tr class="memitem:gabc0ff6dc79f1ebd472b213955331d771"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#gabc0ff6dc79f1ebd472b213955331d771">XDSI_PCR_EOTPENABLE_MASK</a>&#160;&#160;&#160;0x00002000</td></tr>
<tr class="memdesc:gabc0ff6dc79f1ebd472b213955331d771"><td class="mdescLeft">&#160;</td><td class="mdescRight">End of Transmission Mask bit.  <a href="#gabc0ff6dc79f1ebd472b213955331d771">More...</a><br /></td></tr>
<tr class="separator:gabc0ff6dc79f1ebd472b213955331d771"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9578dc1efc2845eb63a46bd5b0927a9a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga9578dc1efc2845eb63a46bd5b0927a9a">XDSI_PCR_PIXELFORMAT_MASK</a>&#160;&#160;&#160;0x00001F80</td></tr>
<tr class="memdesc:ga9578dc1efc2845eb63a46bd5b0927a9a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pixel Format Type Bit Mask.  <a href="#ga9578dc1efc2845eb63a46bd5b0927a9a">More...</a><br /></td></tr>
<tr class="separator:ga9578dc1efc2845eb63a46bd5b0927a9a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8ae113e8b2d35582f48aae14848a9ec2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga8ae113e8b2d35582f48aae14848a9ec2">XDSI_PCR_BLLPMODE_MASK</a>&#160;&#160;&#160;0x00000040</td></tr>
<tr class="memdesc:ga8ae113e8b2d35582f48aae14848a9ec2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Blank packet Mode Bit Mask.  <a href="#ga8ae113e8b2d35582f48aae14848a9ec2">More...</a><br /></td></tr>
<tr class="separator:ga8ae113e8b2d35582f48aae14848a9ec2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6ef282e9923450aa24813440b0d3166d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga6ef282e9923450aa24813440b0d3166d">XDSI_PCR_BLLPTYPE_MASK</a>&#160;&#160;&#160;0x00000020</td></tr>
<tr class="memdesc:ga6ef282e9923450aa24813440b0d3166d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Blank packet type Bit Mask.  <a href="#ga6ef282e9923450aa24813440b0d3166d">More...</a><br /></td></tr>
<tr class="separator:ga6ef282e9923450aa24813440b0d3166d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga271f39b4ede2adc787ac512d872a1466"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga271f39b4ede2adc787ac512d872a1466">XDSI_PCR_VIDEOMODE_MASK</a>&#160;&#160;&#160;0x00000018</td></tr>
<tr class="memdesc:ga271f39b4ede2adc787ac512d872a1466"><td class="mdescLeft">&#160;</td><td class="mdescRight">Video mode Type Bit Mask.  <a href="#ga271f39b4ede2adc787ac512d872a1466">More...</a><br /></td></tr>
<tr class="separator:ga271f39b4ede2adc787ac512d872a1466"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad55a48efbc25b1d31fdd14c855cd4531"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#gad55a48efbc25b1d31fdd14c855cd4531">XDSI_PCR_ACTLANES_MASK</a>&#160;&#160;&#160;0x00000003</td></tr>
<tr class="memdesc:gad55a48efbc25b1d31fdd14c855cd4531"><td class="mdescLeft">&#160;</td><td class="mdescRight">Active lanes in core.  <a href="#gad55a48efbc25b1d31fdd14c855cd4531">More...</a><br /></td></tr>
<tr class="separator:gad55a48efbc25b1d31fdd14c855cd4531"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8c2438103e15a67ad1a3d871da9df8c3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga8c2438103e15a67ad1a3d871da9df8c3">XDSI_PCR_EOTPENABLE_SHIFT</a>&#160;&#160;&#160;13</td></tr>
<tr class="memdesc:ga8c2438103e15a67ad1a3d871da9df8c3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift for EOTP Enable.  <a href="#ga8c2438103e15a67ad1a3d871da9df8c3">More...</a><br /></td></tr>
<tr class="separator:ga8c2438103e15a67ad1a3d871da9df8c3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacf99ead6a914f18003e6d17d21ef1339"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#gacf99ead6a914f18003e6d17d21ef1339">XDSI_PCR_PIXELFORMAT_SHIFT</a>&#160;&#160;&#160;7</td></tr>
<tr class="memdesc:gacf99ead6a914f18003e6d17d21ef1339"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift for pixel format.  <a href="#gacf99ead6a914f18003e6d17d21ef1339">More...</a><br /></td></tr>
<tr class="separator:gacf99ead6a914f18003e6d17d21ef1339"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga601afb13b1b8b27b9b6d7ba8ab7972d7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga601afb13b1b8b27b9b6d7ba8ab7972d7">XDSI_PCR_BLLPMODE_SHIFT</a>&#160;&#160;&#160;6</td></tr>
<tr class="memdesc:ga601afb13b1b8b27b9b6d7ba8ab7972d7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift for Blank packet Type.  <a href="#ga601afb13b1b8b27b9b6d7ba8ab7972d7">More...</a><br /></td></tr>
<tr class="separator:ga601afb13b1b8b27b9b6d7ba8ab7972d7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga72fda4b1dfd3be762e1f9edb46cd4cbb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga72fda4b1dfd3be762e1f9edb46cd4cbb">XDSI_PCR_BLLPTYPE_SHIFT</a>&#160;&#160;&#160;5</td></tr>
<tr class="memdesc:ga72fda4b1dfd3be762e1f9edb46cd4cbb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift for Blank packet Type.  <a href="#ga72fda4b1dfd3be762e1f9edb46cd4cbb">More...</a><br /></td></tr>
<tr class="separator:ga72fda4b1dfd3be762e1f9edb46cd4cbb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad869da63d8dcc972866d7ab606f62a73"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#gad869da63d8dcc972866d7ab606f62a73">XDSI_PCR_VIDEOMODE_SHIFT</a>&#160;&#160;&#160;3</td></tr>
<tr class="memdesc:gad869da63d8dcc972866d7ab606f62a73"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift for Max Lanes.  <a href="#gad869da63d8dcc972866d7ab606f62a73">More...</a><br /></td></tr>
<tr class="separator:gad869da63d8dcc972866d7ab606f62a73"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0417ad9ef1605a2752057a21b96ebc6a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga0417ad9ef1605a2752057a21b96ebc6a">XDSI_PCR_ACTLANES_SHIFT</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:ga0417ad9ef1605a2752057a21b96ebc6a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift for Active Lanes.  <a href="#ga0417ad9ef1605a2752057a21b96ebc6a">More...</a><br /></td></tr>
<tr class="separator:ga0417ad9ef1605a2752057a21b96ebc6a"><td class="memSeparator" colspan="2">&#160;</td></tr>
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Bitmasks and shift of XDSI_STSTUS_OFFSET</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrp0850cd2f57c292f7f3c174ca3349b1fb"></a>This register used to get Command Queue Vacancy </p>
</td></tr>
<tr class="memitem:ga2ef1d4a5206a3857ffa7f6f548395a44"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga2ef1d4a5206a3857ffa7f6f548395a44">XDSI_CMDQ_MASK</a>&#160;&#160;&#160;0x0000003F</td></tr>
<tr class="memdesc:ga2ef1d4a5206a3857ffa7f6f548395a44"><td class="mdescLeft">&#160;</td><td class="mdescRight">Command Queue Vacancy.  <a href="#ga2ef1d4a5206a3857ffa7f6f548395a44">More...</a><br /></td></tr>
<tr class="separator:ga2ef1d4a5206a3857ffa7f6f548395a44"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga60dcf8b29cd972006ff5d5540fce8afc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga60dcf8b29cd972006ff5d5540fce8afc">XDSI_CMDQ_SHIFT</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:ga60dcf8b29cd972006ff5d5540fce8afc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift for Command Queue.  <a href="#ga60dcf8b29cd972006ff5d5540fce8afc">More...</a><br /></td></tr>
<tr class="separator:ga60dcf8b29cd972006ff5d5540fce8afc"><td class="memSeparator" colspan="2">&#160;</td></tr>
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Bitmasks and shift of XDSI_TIME1_OFFSET</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrp04a86ec2463556ca561063a0458af274"></a>This register used to set timing parameters HSA and BLLP </p>
</td></tr>
<tr class="memitem:ga6ca60a035f038d32cc493b2add7658df"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga6ca60a035f038d32cc493b2add7658df">XDSI_TIME1_HSA_MASK</a>&#160;&#160;&#160;0xFFFF0000</td></tr>
<tr class="memdesc:ga6ca60a035f038d32cc493b2add7658df"><td class="mdescLeft">&#160;</td><td class="mdescRight">Horizontal timing parameter HSA mask.  <a href="#ga6ca60a035f038d32cc493b2add7658df">More...</a><br /></td></tr>
<tr class="separator:ga6ca60a035f038d32cc493b2add7658df"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5121bc553dddc02a46d1217ae1f59cb2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga5121bc553dddc02a46d1217ae1f59cb2">XDSI_TIME1_BLLP_BURST_MASK</a>&#160;&#160;&#160;0x0000FFFF</td></tr>
<tr class="memdesc:ga5121bc553dddc02a46d1217ae1f59cb2"><td class="mdescLeft">&#160;</td><td class="mdescRight">BLLP Packet size Mask bit.  <a href="#ga5121bc553dddc02a46d1217ae1f59cb2">More...</a><br /></td></tr>
<tr class="separator:ga5121bc553dddc02a46d1217ae1f59cb2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7fb7c2dbe962b133f786d99190bc9f64"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga7fb7c2dbe962b133f786d99190bc9f64">XDSI_TIME1_HSA_SHIFT</a>&#160;&#160;&#160;16</td></tr>
<tr class="memdesc:ga7fb7c2dbe962b133f786d99190bc9f64"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift for HSA.  <a href="#ga7fb7c2dbe962b133f786d99190bc9f64">More...</a><br /></td></tr>
<tr class="separator:ga7fb7c2dbe962b133f786d99190bc9f64"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf929a8f5bc9aa8fb235dbee913b385c3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#gaf929a8f5bc9aa8fb235dbee913b385c3">XDSI_TIME1_BLLP_BURST_SHIFT</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:gaf929a8f5bc9aa8fb235dbee913b385c3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift for BLLP.  <a href="#gaf929a8f5bc9aa8fb235dbee913b385c3">More...</a><br /></td></tr>
<tr class="separator:gaf929a8f5bc9aa8fb235dbee913b385c3"><td class="memSeparator" colspan="2">&#160;</td></tr>
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Bitmasks and shift of XDSI_TIME2_OFFSET</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrp68da4801fbcb58c9417e2d19f08c7b75"></a>This register used to set timing parameters </p>
</td></tr>
<tr class="memitem:gabcd683e6c5c0ddca8d83b961c1c27571"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#gabcd683e6c5c0ddca8d83b961c1c27571">XDSI_TIME2_HACT_MASK</a>&#160;&#160;&#160;0xFFFF0000</td></tr>
<tr class="memdesc:gabcd683e6c5c0ddca8d83b961c1c27571"><td class="mdescLeft">&#160;</td><td class="mdescRight">Horizontal timing parameter HACT Bit Mask.  <a href="#gabcd683e6c5c0ddca8d83b961c1c27571">More...</a><br /></td></tr>
<tr class="separator:gabcd683e6c5c0ddca8d83b961c1c27571"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga23fd9aec9678b9edee648c802e432708"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga23fd9aec9678b9edee648c802e432708">XDSI_TIME2_VACT_MASK</a>&#160;&#160;&#160;0x0000FFFF</td></tr>
<tr class="memdesc:ga23fd9aec9678b9edee648c802e432708"><td class="mdescLeft">&#160;</td><td class="mdescRight">Vertical timing parameter VACT.  <a href="#ga23fd9aec9678b9edee648c802e432708">More...</a><br /></td></tr>
<tr class="separator:ga23fd9aec9678b9edee648c802e432708"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaaa4ff48185c352ee4048528679f61f0f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#gaaa4ff48185c352ee4048528679f61f0f">XDSI_TIME2_HACT_SHIFT</a>&#160;&#160;&#160;16</td></tr>
<tr class="memdesc:gaaa4ff48185c352ee4048528679f61f0f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift for HACT.  <a href="#gaaa4ff48185c352ee4048528679f61f0f">More...</a><br /></td></tr>
<tr class="separator:gaaa4ff48185c352ee4048528679f61f0f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga98f744957ce0523887308d0d240d62e7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga98f744957ce0523887308d0d240d62e7">XDSI_TIME2_VACT_SHIFT</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:ga98f744957ce0523887308d0d240d62e7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift for VACT.  <a href="#ga98f744957ce0523887308d0d240d62e7">More...</a><br /></td></tr>
<tr class="separator:ga98f744957ce0523887308d0d240d62e7"><td class="memSeparator" colspan="2">&#160;</td></tr>
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Bitmasks and shift of XDSI_TIME3_OFFSET</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrp33c558100021acd917992153ff67db68"></a>This register used to set timing parameters </p>
</td></tr>
<tr class="memitem:ga78c45e2c8728415dfab29796abd2c7bc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga78c45e2c8728415dfab29796abd2c7bc">XDSI_TIME3_HBP_MASK</a>&#160;&#160;&#160;0xFFFF0000</td></tr>
<tr class="memdesc:ga78c45e2c8728415dfab29796abd2c7bc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Horizontal timing parameter HBP Bit Mask.  <a href="#ga78c45e2c8728415dfab29796abd2c7bc">More...</a><br /></td></tr>
<tr class="separator:ga78c45e2c8728415dfab29796abd2c7bc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaeb2b93d556f6bb2e46c31147cea739be"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#gaeb2b93d556f6bb2e46c31147cea739be">XDSI_TIME3_HFP_MASK</a>&#160;&#160;&#160;0x0000FFFF</td></tr>
<tr class="memdesc:gaeb2b93d556f6bb2e46c31147cea739be"><td class="mdescLeft">&#160;</td><td class="mdescRight">Horizontal timing parameter HFP.  <a href="#gaeb2b93d556f6bb2e46c31147cea739be">More...</a><br /></td></tr>
<tr class="separator:gaeb2b93d556f6bb2e46c31147cea739be"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0a805d66d6f6f2bf59097b029e6b431d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga0a805d66d6f6f2bf59097b029e6b431d">XDSI_TIME3_HBP_SHIFT</a>&#160;&#160;&#160;16</td></tr>
<tr class="memdesc:ga0a805d66d6f6f2bf59097b029e6b431d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift for HBP.  <a href="#ga0a805d66d6f6f2bf59097b029e6b431d">More...</a><br /></td></tr>
<tr class="separator:ga0a805d66d6f6f2bf59097b029e6b431d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga067a2b160256964ed106a368a8b076ab"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga067a2b160256964ed106a368a8b076ab">XDSI_TIME3_HFP_SHIFT</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:ga067a2b160256964ed106a368a8b076ab"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift for HFP.  <a href="#ga067a2b160256964ed106a368a8b076ab">More...</a><br /></td></tr>
<tr class="separator:ga067a2b160256964ed106a368a8b076ab"><td class="memSeparator" colspan="2">&#160;</td></tr>
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Bitmasks and offset of XDSI_TIME4_OFFSET</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrp10b53166422fc2c7557751ca8fdef1cf"></a>This register used to set Vertical timing parameters </p>
</td></tr>
<tr class="memitem:gabedf15b8f6fccd8079018080ae7a5c33"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#gabedf15b8f6fccd8079018080ae7a5c33">XDSI_TIME4_VSA_MASK</a>&#160;&#160;&#160;0x00FF0000</td></tr>
<tr class="memdesc:gabedf15b8f6fccd8079018080ae7a5c33"><td class="mdescLeft">&#160;</td><td class="mdescRight">Time 4 Vertical Sync Active Mask.  <a href="#gabedf15b8f6fccd8079018080ae7a5c33">More...</a><br /></td></tr>
<tr class="separator:gabedf15b8f6fccd8079018080ae7a5c33"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4997aca9165c650931dd9db4ff8a8030"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga4997aca9165c650931dd9db4ff8a8030">XDSI_TIME4_VBP_MASK</a>&#160;&#160;&#160;0x0000FF00</td></tr>
<tr class="memdesc:ga4997aca9165c650931dd9db4ff8a8030"><td class="mdescLeft">&#160;</td><td class="mdescRight">Vertical timing parameter1 VBP.  <a href="#ga4997aca9165c650931dd9db4ff8a8030">More...</a><br /></td></tr>
<tr class="separator:ga4997aca9165c650931dd9db4ff8a8030"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacc660200910868714ec0c22d555237d0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#gacc660200910868714ec0c22d555237d0">XDSI_TIME4_VFP_MASK</a>&#160;&#160;&#160;0x000000FF</td></tr>
<tr class="memdesc:gacc660200910868714ec0c22d555237d0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Vertical timing parameter1 VFP.  <a href="#gacc660200910868714ec0c22d555237d0">More...</a><br /></td></tr>
<tr class="separator:gacc660200910868714ec0c22d555237d0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae176d9e5d32984f3954dc074a8b61c18"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#gae176d9e5d32984f3954dc074a8b61c18">XDSI_TIME4_VSA_SHIFT</a>&#160;&#160;&#160;16</td></tr>
<tr class="memdesc:gae176d9e5d32984f3954dc074a8b61c18"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift for VSA.  <a href="#gae176d9e5d32984f3954dc074a8b61c18">More...</a><br /></td></tr>
<tr class="separator:gae176d9e5d32984f3954dc074a8b61c18"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa40458dc22549ca1926f00e1e4621dcc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#gaa40458dc22549ca1926f00e1e4621dcc">XDSI_TIME4_VBP_SHIFT</a>&#160;&#160;&#160;8</td></tr>
<tr class="memdesc:gaa40458dc22549ca1926f00e1e4621dcc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift for VBP.  <a href="#gaa40458dc22549ca1926f00e1e4621dcc">More...</a><br /></td></tr>
<tr class="separator:gaa40458dc22549ca1926f00e1e4621dcc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga675c207e160bff65bb13acfb61a880fe"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga675c207e160bff65bb13acfb61a880fe">XDSI_TIME4_VFP_SHIFT</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:ga675c207e160bff65bb13acfb61a880fe"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift for VFP.  <a href="#ga675c207e160bff65bb13acfb61a880fe">More...</a><br /></td></tr>
<tr class="separator:ga675c207e160bff65bb13acfb61a880fe"><td class="memSeparator" colspan="2">&#160;</td></tr>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Bitmasks and offsets of XDSI_GIER_OFFSET register</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrp09c05af17bbc5361f3e2a2056b9702b3"></a>This register contains the global interrupt enable bit. </p>
</td></tr>
<tr class="memitem:ga38a82b5413fb14f7872ce10d00219173"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga38a82b5413fb14f7872ce10d00219173">XDSI_GIER_GIE_MASK</a>&#160;&#160;&#160;0x00000001</td></tr>
<tr class="memdesc:ga38a82b5413fb14f7872ce10d00219173"><td class="mdescLeft">&#160;</td><td class="mdescRight">Global Interrupt Enable bit.  <a href="#ga38a82b5413fb14f7872ce10d00219173">More...</a><br /></td></tr>
<tr class="separator:ga38a82b5413fb14f7872ce10d00219173"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6bef15fcaa516e04f937b6247da6995b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga6bef15fcaa516e04f937b6247da6995b">XDSI_GIER_GIE_SHIFT</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:ga6bef15fcaa516e04f937b6247da6995b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for Global Interrupt Enable.  <a href="#ga6bef15fcaa516e04f937b6247da6995b">More...</a><br /></td></tr>
<tr class="separator:ga6bef15fcaa516e04f937b6247da6995b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3f97ebd699329e463492b51665c17552"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga3f97ebd699329e463492b51665c17552">XDSI_GIER_SET</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:ga3f97ebd699329e463492b51665c17552"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the Global Interrupts.  <a href="#ga3f97ebd699329e463492b51665c17552">More...</a><br /></td></tr>
<tr class="separator:ga3f97ebd699329e463492b51665c17552"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5e9a10da2d0caec73176b123a921c0d6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga5e9a10da2d0caec73176b123a921c0d6">XDSI_GIER_RESET</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:ga5e9a10da2d0caec73176b123a921c0d6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable the Global Interrupts.  <a href="#ga5e9a10da2d0caec73176b123a921c0d6">More...</a><br /></td></tr>
<tr class="separator:ga5e9a10da2d0caec73176b123a921c0d6"><td class="memSeparator" colspan="2">&#160;</td></tr>
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Bitmasks and offsets of XDSI_ISR_OFFSET register</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrpd518398c2314eeaa475318be107a53d6"></a>This register contains the interrupt status. </p>
</td></tr>
<tr class="memitem:ga864795811a1e6e6c3aa4e0dfed0c36c1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga864795811a1e6e6c3aa4e0dfed0c36c1">XDSI_ISR_CMDQ_FIFO_FULL_MASK</a>&#160;&#160;&#160;0x00000004</td></tr>
<tr class="memdesc:ga864795811a1e6e6c3aa4e0dfed0c36c1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Command queue vacancy full.  <a href="#ga864795811a1e6e6c3aa4e0dfed0c36c1">More...</a><br /></td></tr>
<tr class="separator:ga864795811a1e6e6c3aa4e0dfed0c36c1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga04f7b4ea5744fd64820837635a0bf6a8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga04f7b4ea5744fd64820837635a0bf6a8">XDSI_ISR_DATA_ID_ERR_MASK</a>&#160;&#160;&#160;0x00000002</td></tr>
<tr class="memdesc:ga04f7b4ea5744fd64820837635a0bf6a8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Unsupport datatype Error.  <a href="#ga04f7b4ea5744fd64820837635a0bf6a8">More...</a><br /></td></tr>
<tr class="separator:ga04f7b4ea5744fd64820837635a0bf6a8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa767ee25aa648007b1341d7fcaa492f7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#gaa767ee25aa648007b1341d7fcaa492f7">XDSI_ISR_PXL_UNDR_RUN_MASK</a>&#160;&#160;&#160;0x00000001</td></tr>
<tr class="memdesc:gaa767ee25aa648007b1341d7fcaa492f7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pixel under run error.  <a href="#gaa767ee25aa648007b1341d7fcaa492f7">More...</a><br /></td></tr>
<tr class="separator:gaa767ee25aa648007b1341d7fcaa492f7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0345340d970a5e3a0aaaba31e63bf3b0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga0345340d970a5e3a0aaaba31e63bf3b0">XDSI_ISR_ALLINTR_MASK</a>&#160;&#160;&#160;0x00000007</td></tr>
<tr class="memdesc:ga0345340d970a5e3a0aaaba31e63bf3b0"><td class="mdescLeft">&#160;</td><td class="mdescRight">All interrupts mask.  <a href="#ga0345340d970a5e3a0aaaba31e63bf3b0">More...</a><br /></td></tr>
<tr class="separator:ga0345340d970a5e3a0aaaba31e63bf3b0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae1ada138c561395450b3c62bf783457d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#gae1ada138c561395450b3c62bf783457d">XDSI_ISR_DATA_ID_ERR_SHIFT</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:gae1ada138c561395450b3c62bf783457d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift for Unsupport Data Type.  <a href="#gae1ada138c561395450b3c62bf783457d">More...</a><br /></td></tr>
<tr class="separator:gae1ada138c561395450b3c62bf783457d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad33056d3b7f5b5d52f465ee6d1a827e8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#gad33056d3b7f5b5d52f465ee6d1a827e8">XDSI_ISR_PXL_UNDR_RUN_SHIFT</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:gad33056d3b7f5b5d52f465ee6d1a827e8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift for Pixel under run.  <a href="#gad33056d3b7f5b5d52f465ee6d1a827e8">More...</a><br /></td></tr>
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Bitmasks and offsets of XDSI_IER_OFFSET register</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrpdeb99b5df2e77fb9857cc48d17cf2a1c"></a>This register contains the interrupt enable masks </p>
</td></tr>
<tr class="memitem:ga70eb96c20dcdf636a21fb9140d4798e8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga70eb96c20dcdf636a21fb9140d4798e8">XDSI_IER_CMDQ_FIFO_FULL_MASK</a>&#160;&#160;&#160;0x00000004</td></tr>
<tr class="memdesc:ga70eb96c20dcdf636a21fb9140d4798e8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Command queue vacancy full.  <a href="#ga70eb96c20dcdf636a21fb9140d4798e8">More...</a><br /></td></tr>
<tr class="separator:ga70eb96c20dcdf636a21fb9140d4798e8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab30c45469c76c7f5fcd24956466199ed"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#gab30c45469c76c7f5fcd24956466199ed">XDSI_IER_DATA_ID_ERR_MASK</a>&#160;&#160;&#160;0x00000002</td></tr>
<tr class="memdesc:gab30c45469c76c7f5fcd24956466199ed"><td class="mdescLeft">&#160;</td><td class="mdescRight">Un supported data type.  <a href="#gab30c45469c76c7f5fcd24956466199ed">More...</a><br /></td></tr>
<tr class="separator:gab30c45469c76c7f5fcd24956466199ed"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga73680e01af90788e31e7d4592f6cd600"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga73680e01af90788e31e7d4592f6cd600">XDSI_IER_PXL_UNDR_RUN_MASK</a>&#160;&#160;&#160;0x00000001</td></tr>
<tr class="memdesc:ga73680e01af90788e31e7d4592f6cd600"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pixel Under run.  <a href="#ga73680e01af90788e31e7d4592f6cd600">More...</a><br /></td></tr>
<tr class="separator:ga73680e01af90788e31e7d4592f6cd600"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4eed3e0c901d7b2f8b9cb31f3bc73797"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga4eed3e0c901d7b2f8b9cb31f3bc73797">XDSI_IER_ALLINTR_MASK</a>&#160;&#160;&#160;0x00000007</td></tr>
<tr class="memdesc:ga4eed3e0c901d7b2f8b9cb31f3bc73797"><td class="mdescLeft">&#160;</td><td class="mdescRight">All interrupts mask.  <a href="#ga4eed3e0c901d7b2f8b9cb31f3bc73797">More...</a><br /></td></tr>
<tr class="separator:ga4eed3e0c901d7b2f8b9cb31f3bc73797"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga053204eecdb3569a161927884f46c451"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga053204eecdb3569a161927884f46c451">XDSI_IER_DATA_ID_ERR_SHIFT</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:ga053204eecdb3569a161927884f46c451"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift for Unsupport data type.  <a href="#ga053204eecdb3569a161927884f46c451">More...</a><br /></td></tr>
<tr class="separator:ga053204eecdb3569a161927884f46c451"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad25a30058951dea7bb3138dd2def5f01"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#gad25a30058951dea7bb3138dd2def5f01">XDSI_IER_PXL_UNDR_RUN_SHIFT</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:gad25a30058951dea7bb3138dd2def5f01"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift for Pixel under run.  <a href="#gad25a30058951dea7bb3138dd2def5f01">More...</a><br /></td></tr>
<tr class="separator:gad25a30058951dea7bb3138dd2def5f01"><td class="memSeparator" colspan="2">&#160;</td></tr>
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Bitmasks and offsets of XDSI_COMMAND_OFFSET register</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrp73ca7fbb1b717d9eec3c1bedfd3d6735"></a>This register contains the short packet command TBD as now </p>
</td></tr>
<tr class="memitem:ga698ecf85c35b1bd1e9a98452e7bfa7d3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga698ecf85c35b1bd1e9a98452e7bfa7d3">XDSI_SPKTR_DT_MASK</a>&#160;&#160;&#160;0x0000003F</td></tr>
<tr class="memdesc:ga698ecf85c35b1bd1e9a98452e7bfa7d3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data Type.  <a href="#ga698ecf85c35b1bd1e9a98452e7bfa7d3">More...</a><br /></td></tr>
<tr class="separator:ga698ecf85c35b1bd1e9a98452e7bfa7d3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabd81e18b17e9f396947e2f8b967a4f63"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#gabd81e18b17e9f396947e2f8b967a4f63">XDSI_SPKTR_VC_MASK</a>&#160;&#160;&#160;0x000000C0</td></tr>
<tr class="memdesc:gabd81e18b17e9f396947e2f8b967a4f63"><td class="mdescLeft">&#160;</td><td class="mdescRight">Virtual channel number.  <a href="#gabd81e18b17e9f396947e2f8b967a4f63">More...</a><br /></td></tr>
<tr class="separator:gabd81e18b17e9f396947e2f8b967a4f63"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga27fce78971c09f94ed9e7e1a05ba9700"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga27fce78971c09f94ed9e7e1a05ba9700">XDSI_SPKTR_BYTE1_MASK</a>&#160;&#160;&#160;0x0000FF00</td></tr>
<tr class="memdesc:ga27fce78971c09f94ed9e7e1a05ba9700"><td class="mdescLeft">&#160;</td><td class="mdescRight">BYTE1 mask.  <a href="#ga27fce78971c09f94ed9e7e1a05ba9700">More...</a><br /></td></tr>
<tr class="separator:ga27fce78971c09f94ed9e7e1a05ba9700"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga85f26775c68936a9ed66f330b01e31af"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga85f26775c68936a9ed66f330b01e31af">XDSI_SPKTR_BYTE2_MASK</a>&#160;&#160;&#160;0x00FF0000</td></tr>
<tr class="memdesc:ga85f26775c68936a9ed66f330b01e31af"><td class="mdescLeft">&#160;</td><td class="mdescRight">BYTE2 maks.  <a href="#ga85f26775c68936a9ed66f330b01e31af">More...</a><br /></td></tr>
<tr class="separator:ga85f26775c68936a9ed66f330b01e31af"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga60179c017b6e957ca471de7263ea4296"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga60179c017b6e957ca471de7263ea4296">XDSI_SPKTR_DT_SHIFT</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:ga60179c017b6e957ca471de7263ea4296"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift for DataType.  <a href="#ga60179c017b6e957ca471de7263ea4296">More...</a><br /></td></tr>
<tr class="separator:ga60179c017b6e957ca471de7263ea4296"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaceaab8ceddb1f0642bd2429156d1b7ff"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#gaceaab8ceddb1f0642bd2429156d1b7ff">XDSI_SPKTR_VC_SHIFT</a>&#160;&#160;&#160;6</td></tr>
<tr class="memdesc:gaceaab8ceddb1f0642bd2429156d1b7ff"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift for VC.  <a href="#gaceaab8ceddb1f0642bd2429156d1b7ff">More...</a><br /></td></tr>
<tr class="separator:gaceaab8ceddb1f0642bd2429156d1b7ff"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad3423a9a2931ef18ef5698e033aa9da0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#gad3423a9a2931ef18ef5698e033aa9da0">XDSI_SPKTR_BYTE1_SHIFT</a>&#160;&#160;&#160;8</td></tr>
<tr class="memdesc:gad3423a9a2931ef18ef5698e033aa9da0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift for BYTE1.  <a href="#gad3423a9a2931ef18ef5698e033aa9da0">More...</a><br /></td></tr>
<tr class="separator:gad3423a9a2931ef18ef5698e033aa9da0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga13297e8c2c110f69404cbf9424a468a3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga13297e8c2c110f69404cbf9424a468a3">XDSI_SPKTR_BYTE2_SHIFT</a>&#160;&#160;&#160;16</td></tr>
<tr class="memdesc:ga13297e8c2c110f69404cbf9424a468a3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift for BYTE2.  <a href="#ga13297e8c2c110f69404cbf9424a468a3">More...</a><br /></td></tr>
<tr class="separator:ga13297e8c2c110f69404cbf9424a468a3"><td class="memSeparator" colspan="2">&#160;</td></tr>
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Bitmasks and offsets of XDSI_LTIME_OFFSET register</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrpefb77b48b497b369e9006c89f1d78e59"></a>This register contains the Total Line Time </p>
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<tr class="memitem:ga4aa0ee6eb41e7de52340066bd78af3b6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga4aa0ee6eb41e7de52340066bd78af3b6">XDSI_LTIME_MASK</a>&#160;&#160;&#160;0xFFFFFFFF</td></tr>
<tr class="memdesc:ga4aa0ee6eb41e7de52340066bd78af3b6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Total Line time.  <a href="#ga4aa0ee6eb41e7de52340066bd78af3b6">More...</a><br /></td></tr>
<tr class="separator:ga4aa0ee6eb41e7de52340066bd78af3b6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8c26d704be758564707d5a0d169c2642"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#ga8c26d704be758564707d5a0d169c2642">XDSI_LTIME_SHIFT</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:ga8c26d704be758564707d5a0d169c2642"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift for DataType.  <a href="#ga8c26d704be758564707d5a0d169c2642">More...</a><br /></td></tr>
<tr class="separator:ga8c26d704be758564707d5a0d169c2642"><td class="memSeparator" colspan="2">&#160;</td></tr>
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Bitmasks and offsets of XDSI_BBLP_SIZE_OFFSET register</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrp5eeaace3f9ca2a801b66184f9e84d689"></a>This register contains the BLLP Time duration </p>
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<tr class="memitem:gabdb4cb3cca3cc63b0768f17d86d2ad78"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#gabdb4cb3cca3cc63b0768f17d86d2ad78">XDSI_BLLP_TIME_MASK</a>&#160;&#160;&#160;0xFFFFFFFF</td></tr>
<tr class="memdesc:gabdb4cb3cca3cc63b0768f17d86d2ad78"><td class="mdescLeft">&#160;</td><td class="mdescRight">BLLP Size.  <a href="#gabdb4cb3cca3cc63b0768f17d86d2ad78">More...</a><br /></td></tr>
<tr class="separator:gabdb4cb3cca3cc63b0768f17d86d2ad78"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab33892b702ec12e0b363196d16a6467a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dsi__v1__0.html#gab33892b702ec12e0b363196d16a6467a">XDSI_BLLP_TIME_SHIFT</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:gab33892b702ec12e0b363196d16a6467a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift for BLLP.  <a href="#gab33892b702ec12e0b363196d16a6467a">More...</a><br /></td></tr>
<tr class="separator:gab33892b702ec12e0b363196d16a6467a"><td class="memSeparator" colspan="2">&#160;</td></tr>
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<h2 class="groupheader">Macro Definition Documentation</h2>
<a id="gabdb4cb3cca3cc63b0768f17d86d2ad78"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gabdb4cb3cca3cc63b0768f17d86d2ad78">&#9670;&nbsp;</a></span>XDSI_BLLP_TIME_MASK</h2>

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          <td class="memname">#define XDSI_BLLP_TIME_MASK&#160;&#160;&#160;0xFFFFFFFF</td>
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</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>BLLP Size. </p>

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</div>
<a id="gac838501f9d54d130a9b3599b7b9117f8"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gac838501f9d54d130a9b3599b7b9117f8">&#9670;&nbsp;</a></span>XDSI_BLLP_TIME_OFFSET</h2>

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      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_BLLP_TIME_OFFSET&#160;&#160;&#160;0x00000064</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>BLLP Time duration Offset. </p>

</div>
</div>
<a id="gab33892b702ec12e0b363196d16a6467a"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gab33892b702ec12e0b363196d16a6467a">&#9670;&nbsp;</a></span>XDSI_BLLP_TIME_SHIFT</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_BLLP_TIME_SHIFT&#160;&#160;&#160;0</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Shift for BLLP. </p>

</div>
</div>
<a id="ga27e3fe15791633934c2362977de80c5d"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga27e3fe15791633934c2362977de80c5d">&#9670;&nbsp;</a></span>XDSI_CCR_COREENB_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_CCR_COREENB_MASK&#160;&#160;&#160;0x00000001</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Enable/Disable core Mask. </p>

</div>
</div>
<a id="gabebe3e1ad24a94fe95a71eaecb51d037"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gabebe3e1ad24a94fe95a71eaecb51d037">&#9670;&nbsp;</a></span>XDSI_CCR_COREENB_SHIFT</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_CCR_COREENB_SHIFT&#160;&#160;&#160;0</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Shift for Core Enable. </p>

</div>
</div>
<a id="ga1d0c1ae0c0d9924987be74d0c7000265"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga1d0c1ae0c0d9924987be74d0c7000265">&#9670;&nbsp;</a></span>XDSI_CCR_CRREADY_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_CCR_CRREADY_MASK&#160;&#160;&#160;0x00000004</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Controller Ready bit Mask. </p>

</div>
</div>
<a id="ga0933ad53dc42710435be79ad4316720d"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga0933ad53dc42710435be79ad4316720d">&#9670;&nbsp;</a></span>XDSI_CCR_CRREADY_SHIFT</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_CCR_CRREADY_SHIFT&#160;&#160;&#160;2</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Shift for Controller Ready. </p>

</div>
</div>
<a id="gaeed29761e55d0d1bbe7760684481a396"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaeed29761e55d0d1bbe7760684481a396">&#9670;&nbsp;</a></span>XDSI_CCR_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_CCR_OFFSET&#160;&#160;&#160;0x00000000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Core Configuration Register Offset. </p>

</div>
</div>
<a id="gaa2a45eef681d96a7a2d4e36531589db8"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaa2a45eef681d96a7a2d4e36531589db8">&#9670;&nbsp;</a></span>XDSI_CCR_SOFTRESET_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_CCR_SOFTRESET_MASK&#160;&#160;&#160;0x00000002</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Soft Reset core bit Mask. </p>

</div>
</div>
<a id="ga1f2d881102a20feb2fa29e29018eaa53"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga1f2d881102a20feb2fa29e29018eaa53">&#9670;&nbsp;</a></span>XDSI_CCR_SOFTRESET_SHIFT</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_CCR_SOFTRESET_SHIFT&#160;&#160;&#160;1</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Shift for Soft reset. </p>

</div>
</div>
<a id="ga2ef1d4a5206a3857ffa7f6f548395a44"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga2ef1d4a5206a3857ffa7f6f548395a44">&#9670;&nbsp;</a></span>XDSI_CMDQ_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_CMDQ_MASK&#160;&#160;&#160;0x0000003F</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Command Queue Vacancy. </p>

</div>
</div>
<a id="ga60dcf8b29cd972006ff5d5540fce8afc"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga60dcf8b29cd972006ff5d5540fce8afc">&#9670;&nbsp;</a></span>XDSI_CMDQ_SHIFT</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_CMDQ_SHIFT&#160;&#160;&#160;0</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Shift for Command Queue. </p>

</div>
</div>
<a id="ga756164904eef9cd3ebee25d94e973236"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga756164904eef9cd3ebee25d94e973236">&#9670;&nbsp;</a></span>XDSI_COMMAND_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_COMMAND_OFFSET&#160;&#160;&#160;0x00000030</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Packet Entry to command Queue. </p>

</div>
</div>
<a id="ga38a82b5413fb14f7872ce10d00219173"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga38a82b5413fb14f7872ce10d00219173">&#9670;&nbsp;</a></span>XDSI_GIER_GIE_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_GIER_GIE_MASK&#160;&#160;&#160;0x00000001</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Global Interrupt Enable bit. </p>

</div>
</div>
<a id="ga6bef15fcaa516e04f937b6247da6995b"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga6bef15fcaa516e04f937b6247da6995b">&#9670;&nbsp;</a></span>XDSI_GIER_GIE_SHIFT</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_GIER_GIE_SHIFT&#160;&#160;&#160;0</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Shift bits for Global Interrupt Enable. </p>

</div>
</div>
<a id="gadfe1bdf3d5aa5eec603cbafa671558f9"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gadfe1bdf3d5aa5eec603cbafa671558f9">&#9670;&nbsp;</a></span>XDSI_GIER_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_GIER_OFFSET&#160;&#160;&#160;0x00000020</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Global Interrupt Register Offset. </p>

</div>
</div>
<a id="ga5e9a10da2d0caec73176b123a921c0d6"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga5e9a10da2d0caec73176b123a921c0d6">&#9670;&nbsp;</a></span>XDSI_GIER_RESET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_GIER_RESET&#160;&#160;&#160;0</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Disable the Global Interrupts. </p>

</div>
</div>
<a id="ga3f97ebd699329e463492b51665c17552"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga3f97ebd699329e463492b51665c17552">&#9670;&nbsp;</a></span>XDSI_GIER_SET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_GIER_SET&#160;&#160;&#160;1</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Enable the Global Interrupts. </p>

</div>
</div>
<a id="ga4eed3e0c901d7b2f8b9cb31f3bc73797"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga4eed3e0c901d7b2f8b9cb31f3bc73797">&#9670;&nbsp;</a></span>XDSI_IER_ALLINTR_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_IER_ALLINTR_MASK&#160;&#160;&#160;0x00000007</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>All interrupts mask. </p>

<p class="reference">Referenced by <a class="el" href="group__dsi__v1__0.html#ga11eb46d583cc851d5f7746856a7526e7">XDsi_InterruptClear()</a>, <a class="el" href="group__dsi__v1__0.html#gac3e09d98f76b1f93db4ccbf0aa149aa5">XDsi_InterruptDisable()</a>, and <a class="el" href="group__dsi__v1__0.html#ga5884ff79a940d84e55fdc7d9fc6be1f7">XDsi_InterruptEnable()</a>.</p>

</div>
</div>
<a id="ga70eb96c20dcdf636a21fb9140d4798e8"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga70eb96c20dcdf636a21fb9140d4798e8">&#9670;&nbsp;</a></span>XDSI_IER_CMDQ_FIFO_FULL_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_IER_CMDQ_FIFO_FULL_MASK&#160;&#160;&#160;0x00000004</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Command queue vacancy full. </p>

<p class="reference">Referenced by <a class="el" href="group__dsi__v1__0.html#ga925b34dea84b254a23db6570082c70fe">XDsi_IntrHandler()</a>.</p>

</div>
</div>
<a id="gab30c45469c76c7f5fcd24956466199ed"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gab30c45469c76c7f5fcd24956466199ed">&#9670;&nbsp;</a></span>XDSI_IER_DATA_ID_ERR_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_IER_DATA_ID_ERR_MASK&#160;&#160;&#160;0x00000002</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Un supported data type. </p>

<p class="reference">Referenced by <a class="el" href="group__dsi__v1__0.html#ga925b34dea84b254a23db6570082c70fe">XDsi_IntrHandler()</a>.</p>

</div>
</div>
<a id="ga053204eecdb3569a161927884f46c451"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga053204eecdb3569a161927884f46c451">&#9670;&nbsp;</a></span>XDSI_IER_DATA_ID_ERR_SHIFT</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_IER_DATA_ID_ERR_SHIFT&#160;&#160;&#160;1</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Shift for Unsupport data type. </p>

</div>
</div>
<a id="ga7c9dabd1df1c9bbbe2f07d6886b0d08e"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga7c9dabd1df1c9bbbe2f07d6886b0d08e">&#9670;&nbsp;</a></span>XDSI_IER_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_IER_OFFSET&#160;&#160;&#160;0x00000028</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Interrupt Enable Register. </p>

</div>
</div>
<a id="ga73680e01af90788e31e7d4592f6cd600"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga73680e01af90788e31e7d4592f6cd600">&#9670;&nbsp;</a></span>XDSI_IER_PXL_UNDR_RUN_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_IER_PXL_UNDR_RUN_MASK&#160;&#160;&#160;0x00000001</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Pixel Under run. </p>

<p class="reference">Referenced by <a class="el" href="group__dsi__v1__0.html#ga925b34dea84b254a23db6570082c70fe">XDsi_IntrHandler()</a>.</p>

</div>
</div>
<a id="gad25a30058951dea7bb3138dd2def5f01"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gad25a30058951dea7bb3138dd2def5f01">&#9670;&nbsp;</a></span>XDSI_IER_PXL_UNDR_RUN_SHIFT</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_IER_PXL_UNDR_RUN_SHIFT&#160;&#160;&#160;0</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Shift for Pixel under run. </p>

</div>
</div>
<a id="ga0345340d970a5e3a0aaaba31e63bf3b0"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga0345340d970a5e3a0aaaba31e63bf3b0">&#9670;&nbsp;</a></span>XDSI_ISR_ALLINTR_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_ISR_ALLINTR_MASK&#160;&#160;&#160;0x00000007</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>All interrupts mask. </p>

</div>
</div>
<a id="ga864795811a1e6e6c3aa4e0dfed0c36c1"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga864795811a1e6e6c3aa4e0dfed0c36c1">&#9670;&nbsp;</a></span>XDSI_ISR_CMDQ_FIFO_FULL_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_ISR_CMDQ_FIFO_FULL_MASK&#160;&#160;&#160;0x00000004</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Command queue vacancy full. </p>

</div>
</div>
<a id="ga04f7b4ea5744fd64820837635a0bf6a8"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga04f7b4ea5744fd64820837635a0bf6a8">&#9670;&nbsp;</a></span>XDSI_ISR_DATA_ID_ERR_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_ISR_DATA_ID_ERR_MASK&#160;&#160;&#160;0x00000002</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Unsupport datatype Error. </p>

</div>
</div>
<a id="gae1ada138c561395450b3c62bf783457d"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gae1ada138c561395450b3c62bf783457d">&#9670;&nbsp;</a></span>XDSI_ISR_DATA_ID_ERR_SHIFT</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_ISR_DATA_ID_ERR_SHIFT&#160;&#160;&#160;1</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Shift for Unsupport Data Type. </p>

</div>
</div>
<a id="gacb8fcfb941281bff18fdf99901624f50"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gacb8fcfb941281bff18fdf99901624f50">&#9670;&nbsp;</a></span>XDSI_ISR_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_ISR_OFFSET&#160;&#160;&#160;0x00000024</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Interrupt Status Register. </p>

</div>
</div>
<a id="gaa767ee25aa648007b1341d7fcaa492f7"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaa767ee25aa648007b1341d7fcaa492f7">&#9670;&nbsp;</a></span>XDSI_ISR_PXL_UNDR_RUN_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_ISR_PXL_UNDR_RUN_MASK&#160;&#160;&#160;0x00000001</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Pixel under run error. </p>

</div>
</div>
<a id="gad33056d3b7f5b5d52f465ee6d1a827e8"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gad33056d3b7f5b5d52f465ee6d1a827e8">&#9670;&nbsp;</a></span>XDSI_ISR_PXL_UNDR_RUN_SHIFT</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_ISR_PXL_UNDR_RUN_SHIFT&#160;&#160;&#160;0</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Shift for Pixel under run. </p>

</div>
</div>
<a id="ga4aa0ee6eb41e7de52340066bd78af3b6"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga4aa0ee6eb41e7de52340066bd78af3b6">&#9670;&nbsp;</a></span>XDSI_LTIME_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_LTIME_MASK&#160;&#160;&#160;0xFFFFFFFF</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Total Line time. </p>

</div>
</div>
<a id="ga59b5452a5b5f1076b77a024729ef910d"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga59b5452a5b5f1076b77a024729ef910d">&#9670;&nbsp;</a></span>XDSI_LTIME_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_LTIME_OFFSET&#160;&#160;&#160;0x00000060</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Total Line Timing Offset. </p>

</div>
</div>
<a id="ga8c26d704be758564707d5a0d169c2642"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga8c26d704be758564707d5a0d169c2642">&#9670;&nbsp;</a></span>XDSI_LTIME_SHIFT</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_LTIME_SHIFT&#160;&#160;&#160;0</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Shift for DataType. </p>

</div>
</div>
<a id="gafd5cde340aa4524c2bab0f5c570bf542"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gafd5cde340aa4524c2bab0f5c570bf542">&#9670;&nbsp;</a></span>XDSI_MAX_LANES</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_MAX_LANES&#160;&#160;&#160;4</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Max Lanes supported by DSI. </p>

</div>
</div>
<a id="gad55a48efbc25b1d31fdd14c855cd4531"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gad55a48efbc25b1d31fdd14c855cd4531">&#9670;&nbsp;</a></span>XDSI_PCR_ACTLANES_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_PCR_ACTLANES_MASK&#160;&#160;&#160;0x00000003</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Active lanes in core. </p>

</div>
</div>
<a id="ga0417ad9ef1605a2752057a21b96ebc6a"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga0417ad9ef1605a2752057a21b96ebc6a">&#9670;&nbsp;</a></span>XDSI_PCR_ACTLANES_SHIFT</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_PCR_ACTLANES_SHIFT&#160;&#160;&#160;0</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Shift for Active Lanes. </p>

</div>
</div>
<a id="ga8ae113e8b2d35582f48aae14848a9ec2"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga8ae113e8b2d35582f48aae14848a9ec2">&#9670;&nbsp;</a></span>XDSI_PCR_BLLPMODE_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_PCR_BLLPMODE_MASK&#160;&#160;&#160;0x00000040</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Blank packet Mode Bit Mask. </p>

</div>
</div>
<a id="ga601afb13b1b8b27b9b6d7ba8ab7972d7"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga601afb13b1b8b27b9b6d7ba8ab7972d7">&#9670;&nbsp;</a></span>XDSI_PCR_BLLPMODE_SHIFT</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_PCR_BLLPMODE_SHIFT&#160;&#160;&#160;6</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Shift for Blank packet Type. </p>

</div>
</div>
<a id="ga6ef282e9923450aa24813440b0d3166d"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga6ef282e9923450aa24813440b0d3166d">&#9670;&nbsp;</a></span>XDSI_PCR_BLLPTYPE_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_PCR_BLLPTYPE_MASK&#160;&#160;&#160;0x00000020</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Blank packet type Bit Mask. </p>

</div>
</div>
<a id="ga72fda4b1dfd3be762e1f9edb46cd4cbb"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga72fda4b1dfd3be762e1f9edb46cd4cbb">&#9670;&nbsp;</a></span>XDSI_PCR_BLLPTYPE_SHIFT</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_PCR_BLLPTYPE_SHIFT&#160;&#160;&#160;5</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Shift for Blank packet Type. </p>

</div>
</div>
<a id="gabc0ff6dc79f1ebd472b213955331d771"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gabc0ff6dc79f1ebd472b213955331d771">&#9670;&nbsp;</a></span>XDSI_PCR_EOTPENABLE_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_PCR_EOTPENABLE_MASK&#160;&#160;&#160;0x00002000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>End of Transmission Mask bit. </p>

</div>
</div>
<a id="ga8c2438103e15a67ad1a3d871da9df8c3"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga8c2438103e15a67ad1a3d871da9df8c3">&#9670;&nbsp;</a></span>XDSI_PCR_EOTPENABLE_SHIFT</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_PCR_EOTPENABLE_SHIFT&#160;&#160;&#160;13</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Shift for EOTP Enable. </p>

</div>
</div>
<a id="ga5473a7e6d9e1d01a628e9626c9ade095"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga5473a7e6d9e1d01a628e9626c9ade095">&#9670;&nbsp;</a></span>XDSI_PCR_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_PCR_OFFSET&#160;&#160;&#160;0x00000004</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Protocol Configuration Register Offset. </p>

</div>
</div>
<a id="ga9578dc1efc2845eb63a46bd5b0927a9a"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga9578dc1efc2845eb63a46bd5b0927a9a">&#9670;&nbsp;</a></span>XDSI_PCR_PIXELFORMAT_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_PCR_PIXELFORMAT_MASK&#160;&#160;&#160;0x00001F80</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Pixel Format Type Bit Mask. </p>

</div>
</div>
<a id="gacf99ead6a914f18003e6d17d21ef1339"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gacf99ead6a914f18003e6d17d21ef1339">&#9670;&nbsp;</a></span>XDSI_PCR_PIXELFORMAT_SHIFT</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_PCR_PIXELFORMAT_SHIFT&#160;&#160;&#160;7</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Shift for pixel format. </p>

</div>
</div>
<a id="ga271f39b4ede2adc787ac512d872a1466"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga271f39b4ede2adc787ac512d872a1466">&#9670;&nbsp;</a></span>XDSI_PCR_VIDEOMODE_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_PCR_VIDEOMODE_MASK&#160;&#160;&#160;0x00000018</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Video mode Type Bit Mask. </p>

</div>
</div>
<a id="gad869da63d8dcc972866d7ab606f62a73"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gad869da63d8dcc972866d7ab606f62a73">&#9670;&nbsp;</a></span>XDSI_PCR_VIDEOMODE_SHIFT</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_PCR_VIDEOMODE_SHIFT&#160;&#160;&#160;3</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Shift for Max Lanes. </p>

</div>
</div>
<a id="ga27fce78971c09f94ed9e7e1a05ba9700"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga27fce78971c09f94ed9e7e1a05ba9700">&#9670;&nbsp;</a></span>XDSI_SPKTR_BYTE1_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_SPKTR_BYTE1_MASK&#160;&#160;&#160;0x0000FF00</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>BYTE1 mask. </p>

</div>
</div>
<a id="gad3423a9a2931ef18ef5698e033aa9da0"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gad3423a9a2931ef18ef5698e033aa9da0">&#9670;&nbsp;</a></span>XDSI_SPKTR_BYTE1_SHIFT</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_SPKTR_BYTE1_SHIFT&#160;&#160;&#160;8</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Shift for BYTE1. </p>

<p class="reference">Referenced by <a class="el" href="group__dsi__v1__0.html#gab2cf4f33eff4d4e77d083335025c08f9">XDsi_SendShortPacket()</a>.</p>

</div>
</div>
<a id="ga85f26775c68936a9ed66f330b01e31af"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga85f26775c68936a9ed66f330b01e31af">&#9670;&nbsp;</a></span>XDSI_SPKTR_BYTE2_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_SPKTR_BYTE2_MASK&#160;&#160;&#160;0x00FF0000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>BYTE2 maks. </p>

</div>
</div>
<a id="ga13297e8c2c110f69404cbf9424a468a3"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga13297e8c2c110f69404cbf9424a468a3">&#9670;&nbsp;</a></span>XDSI_SPKTR_BYTE2_SHIFT</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_SPKTR_BYTE2_SHIFT&#160;&#160;&#160;16</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Shift for BYTE2. </p>

<p class="reference">Referenced by <a class="el" href="group__dsi__v1__0.html#gab2cf4f33eff4d4e77d083335025c08f9">XDsi_SendShortPacket()</a>.</p>

</div>
</div>
<a id="ga698ecf85c35b1bd1e9a98452e7bfa7d3"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga698ecf85c35b1bd1e9a98452e7bfa7d3">&#9670;&nbsp;</a></span>XDSI_SPKTR_DT_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_SPKTR_DT_MASK&#160;&#160;&#160;0x0000003F</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Data Type. </p>

</div>
</div>
<a id="ga60179c017b6e957ca471de7263ea4296"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga60179c017b6e957ca471de7263ea4296">&#9670;&nbsp;</a></span>XDSI_SPKTR_DT_SHIFT</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_SPKTR_DT_SHIFT&#160;&#160;&#160;0</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Shift for DataType. </p>

</div>
</div>
<a id="gabd81e18b17e9f396947e2f8b967a4f63"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gabd81e18b17e9f396947e2f8b967a4f63">&#9670;&nbsp;</a></span>XDSI_SPKTR_VC_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_SPKTR_VC_MASK&#160;&#160;&#160;0x000000C0</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Virtual channel number. </p>

</div>
</div>
<a id="gaceaab8ceddb1f0642bd2429156d1b7ff"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaceaab8ceddb1f0642bd2429156d1b7ff">&#9670;&nbsp;</a></span>XDSI_SPKTR_VC_SHIFT</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_SPKTR_VC_SHIFT&#160;&#160;&#160;6</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Shift for VC. </p>

<p class="reference">Referenced by <a class="el" href="group__dsi__v1__0.html#gab2cf4f33eff4d4e77d083335025c08f9">XDsi_SendShortPacket()</a>.</p>

</div>
</div>
<a id="ga3eec9707c024afb9195332aebdf1af60"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga3eec9707c024afb9195332aebdf1af60">&#9670;&nbsp;</a></span>XDSI_STATUS_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_STATUS_OFFSET&#160;&#160;&#160;0x0000002C</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Status Register. </p>

</div>
</div>
<a id="ga5121bc553dddc02a46d1217ae1f59cb2"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga5121bc553dddc02a46d1217ae1f59cb2">&#9670;&nbsp;</a></span>XDSI_TIME1_BLLP_BURST_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_TIME1_BLLP_BURST_MASK&#160;&#160;&#160;0x0000FFFF</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>BLLP Packet size Mask bit. </p>

</div>
</div>
<a id="gaf929a8f5bc9aa8fb235dbee913b385c3"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaf929a8f5bc9aa8fb235dbee913b385c3">&#9670;&nbsp;</a></span>XDSI_TIME1_BLLP_BURST_SHIFT</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_TIME1_BLLP_BURST_SHIFT&#160;&#160;&#160;0</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Shift for BLLP. </p>

</div>
</div>
<a id="ga6ca60a035f038d32cc493b2add7658df"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga6ca60a035f038d32cc493b2add7658df">&#9670;&nbsp;</a></span>XDSI_TIME1_HSA_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_TIME1_HSA_MASK&#160;&#160;&#160;0xFFFF0000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Horizontal timing parameter HSA mask. </p>

</div>
</div>
<a id="ga7fb7c2dbe962b133f786d99190bc9f64"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga7fb7c2dbe962b133f786d99190bc9f64">&#9670;&nbsp;</a></span>XDSI_TIME1_HSA_SHIFT</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_TIME1_HSA_SHIFT&#160;&#160;&#160;16</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Shift for HSA. </p>

</div>
</div>
<a id="gac4a366cd8b489f2300cf007185d74c6a"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gac4a366cd8b489f2300cf007185d74c6a">&#9670;&nbsp;</a></span>XDSI_TIME1_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_TIME1_OFFSET&#160;&#160;&#160;0x00000050</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Time 1 Offset. </p>

</div>
</div>
<a id="gabcd683e6c5c0ddca8d83b961c1c27571"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gabcd683e6c5c0ddca8d83b961c1c27571">&#9670;&nbsp;</a></span>XDSI_TIME2_HACT_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_TIME2_HACT_MASK&#160;&#160;&#160;0xFFFF0000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Horizontal timing parameter HACT Bit Mask. </p>

</div>
</div>
<a id="gaaa4ff48185c352ee4048528679f61f0f"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaaa4ff48185c352ee4048528679f61f0f">&#9670;&nbsp;</a></span>XDSI_TIME2_HACT_SHIFT</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_TIME2_HACT_SHIFT&#160;&#160;&#160;16</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Shift for HACT. </p>

</div>
</div>
<a id="gae376be8a524a2ed0c89edbbd4ef69e12"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gae376be8a524a2ed0c89edbbd4ef69e12">&#9670;&nbsp;</a></span>XDSI_TIME2_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_TIME2_OFFSET&#160;&#160;&#160;0x00000054</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Time 2 Offset. </p>

</div>
</div>
<a id="ga23fd9aec9678b9edee648c802e432708"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga23fd9aec9678b9edee648c802e432708">&#9670;&nbsp;</a></span>XDSI_TIME2_VACT_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_TIME2_VACT_MASK&#160;&#160;&#160;0x0000FFFF</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Vertical timing parameter VACT. </p>

</div>
</div>
<a id="ga98f744957ce0523887308d0d240d62e7"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga98f744957ce0523887308d0d240d62e7">&#9670;&nbsp;</a></span>XDSI_TIME2_VACT_SHIFT</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_TIME2_VACT_SHIFT&#160;&#160;&#160;0</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Shift for VACT. </p>

</div>
</div>
<a id="ga78c45e2c8728415dfab29796abd2c7bc"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga78c45e2c8728415dfab29796abd2c7bc">&#9670;&nbsp;</a></span>XDSI_TIME3_HBP_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_TIME3_HBP_MASK&#160;&#160;&#160;0xFFFF0000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Horizontal timing parameter HBP Bit Mask. </p>

</div>
</div>
<a id="ga0a805d66d6f6f2bf59097b029e6b431d"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga0a805d66d6f6f2bf59097b029e6b431d">&#9670;&nbsp;</a></span>XDSI_TIME3_HBP_SHIFT</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_TIME3_HBP_SHIFT&#160;&#160;&#160;16</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Shift for HBP. </p>

</div>
</div>
<a id="gaeb2b93d556f6bb2e46c31147cea739be"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaeb2b93d556f6bb2e46c31147cea739be">&#9670;&nbsp;</a></span>XDSI_TIME3_HFP_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_TIME3_HFP_MASK&#160;&#160;&#160;0x0000FFFF</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Horizontal timing parameter HFP. </p>

</div>
</div>
<a id="ga067a2b160256964ed106a368a8b076ab"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga067a2b160256964ed106a368a8b076ab">&#9670;&nbsp;</a></span>XDSI_TIME3_HFP_SHIFT</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_TIME3_HFP_SHIFT&#160;&#160;&#160;0</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Shift for HFP. </p>

</div>
</div>
<a id="gac71b3e52fa7de0307f51ab1f7131f732"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gac71b3e52fa7de0307f51ab1f7131f732">&#9670;&nbsp;</a></span>XDSI_TIME3_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_TIME3_OFFSET&#160;&#160;&#160;0x00000058</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Time 3 Offset. </p>

</div>
</div>
<a id="ga85afc2d5f71f5a75f74c2011189e3dce"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga85afc2d5f71f5a75f74c2011189e3dce">&#9670;&nbsp;</a></span>XDSI_TIME4_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_TIME4_OFFSET&#160;&#160;&#160;0x0000005C</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Time 4 Offset. </p>

</div>
</div>
<a id="ga4997aca9165c650931dd9db4ff8a8030"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga4997aca9165c650931dd9db4ff8a8030">&#9670;&nbsp;</a></span>XDSI_TIME4_VBP_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_TIME4_VBP_MASK&#160;&#160;&#160;0x0000FF00</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Vertical timing parameter1 VBP. </p>

</div>
</div>
<a id="gaa40458dc22549ca1926f00e1e4621dcc"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaa40458dc22549ca1926f00e1e4621dcc">&#9670;&nbsp;</a></span>XDSI_TIME4_VBP_SHIFT</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_TIME4_VBP_SHIFT&#160;&#160;&#160;8</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Shift for VBP. </p>

</div>
</div>
<a id="gacc660200910868714ec0c22d555237d0"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gacc660200910868714ec0c22d555237d0">&#9670;&nbsp;</a></span>XDSI_TIME4_VFP_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_TIME4_VFP_MASK&#160;&#160;&#160;0x000000FF</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Vertical timing parameter1 VFP. </p>

</div>
</div>
<a id="ga675c207e160bff65bb13acfb61a880fe"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga675c207e160bff65bb13acfb61a880fe">&#9670;&nbsp;</a></span>XDSI_TIME4_VFP_SHIFT</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_TIME4_VFP_SHIFT&#160;&#160;&#160;0</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Shift for VFP. </p>

</div>
</div>
<a id="gabedf15b8f6fccd8079018080ae7a5c33"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gabedf15b8f6fccd8079018080ae7a5c33">&#9670;&nbsp;</a></span>XDSI_TIME4_VSA_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_TIME4_VSA_MASK&#160;&#160;&#160;0x00FF0000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Time 4 Vertical Sync Active Mask. </p>

</div>
</div>
<a id="gae176d9e5d32984f3954dc074a8b61c18"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gae176d9e5d32984f3954dc074a8b61c18">&#9670;&nbsp;</a></span>XDSI_TIME4_VSA_SHIFT</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDSI_TIME4_VSA_SHIFT&#160;&#160;&#160;16</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>&gt;</code></p>

<p>Shift for VSA. </p>

</div>
</div>
<h2 class="groupheader">Typedef Documentation</h2>
<a id="gadb49962ec03e915633d604c392c5bb3e"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gadb49962ec03e915633d604c392c5bb3e">&#9670;&nbsp;</a></span>XDsi_Callback</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">typedef void(* XDsi_Callback) (void *CallbackRef, u32 Mask)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi_8h.html">xdsi.h</a>&gt;</code></p>

<p>Callback type for all interrupts defined. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">CallBackRef</td><td>is a callback reference passed in by the upper layer when setting the callback functions, and passed back to the upper layer when the callback is invoked. </td></tr>
    <tr><td class="paramname">Mask</td><td>is a bit mask indicating the cause of the event. For current core version, this parameter is "OR" of 0 or more XDSI_ISR_*_MASK constants defined in <a class="el" href="xdsi__hw_8h.html">xdsi_hw.h</a>.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

</div>
</div>
<h2 class="groupheader">Enumeration Type Documentation</h2>
<a id="ga7931c0f0d26ec1b2bc681f2efe0cf62f"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga7931c0f0d26ec1b2bc681f2efe0cf62f">&#9670;&nbsp;</a></span>XDsi_VideoMode</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">enum <a class="el" href="group__dsi__v1__0.html#ga7931c0f0d26ec1b2bc681f2efe0cf62f">XDsi_VideoMode</a></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi_8h.html">xdsi.h</a>&gt;</code></p>

<p>Video Timing Mode by default Non-burst mode with Sync Events. </p>

</div>
</div>
<h2 class="groupheader">Function Documentation</h2>
<a id="ga96a76baa5b141b35af0d7cc697ade584"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga96a76baa5b141b35af0d7cc697ade584">&#9670;&nbsp;</a></span>XDsi_Activate()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XDsi_Activate </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dsi.html">XDsi</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XDsi_Selection&#160;</td>
          <td class="paramname"><em>Flag</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi_8c.html">xdsi.c</a>&gt;</code></p>

<p>This function will enable/disable the IP Core to start processing. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the <a class="el" href="struct_x_dsi.html" title="The XDsi driver instance data. ">XDsi</a> instance to operate on.</td></tr>
    <tr><td class="paramname">Flag</td><td>will be used to indicate Enable or Disable action.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS On enabling/disabling the core.</li>
</ul>
</dd></dl>
<ul>
<li>XST_INVALID_PARAM if user passes invalid parameter.</li>
</ul>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p class="reference">References <a class="el" href="struct_x_dsi.html#a67a8fb9ad74652a0aab81eb036482f9e">XDsi::IsReady</a>.</p>

</div>
</div>
<a id="ga7ee417c05f7b0171f4b5ab732fd92054"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga7ee417c05f7b0171f4b5ab732fd92054">&#9670;&nbsp;</a></span>XDsi_CfgInitialize()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XDsi_CfgInitialize </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dsi.html">XDsi</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_dsi___config.html">XDsi_Config</a> *&#160;</td>
          <td class="paramname"><em>CfgPtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">UINTPTR&#160;</td>
          <td class="paramname"><em>EffectiveAddr</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi_8c.html">xdsi.c</a>&gt;</code></p>

<p>Initialize the <a class="el" href="struct_x_dsi.html" title="The XDsi driver instance data. ">XDsi</a> instance provided by the caller based on the given Config structure. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the <a class="el" href="struct_x_dsi.html" title="The XDsi driver instance data. ">XDsi</a> instance to operate on. </td></tr>
    <tr><td class="paramname">CfgPtr</td><td>is the device configuration structure containing information about a specific DSI. </td></tr>
    <tr><td class="paramname">EffectiveAddr</td><td>is the base address of the device. If address translation is being used, then this parameter must reflect the virtual base address. Otherwise, the physical address should be used.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS Initialization was successful.</li>
<li>XST_FAILURE Initialization was unsuccessful.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p class="reference">References <a class="el" href="struct_x_dsi___config.html#a4691daa5e5f6b7f829e99c2075f45dcb">XDsi_Config::BaseAddr</a>, <a class="el" href="struct_x_dsi.html#a63fb2a71fdfd1d2d39a2b8827662b7c4">XDsi::Config</a>, and <a class="el" href="struct_x_dsi.html#af8b0713407874012d72fb3a0deec7e53">XDsi::UnSupportedDataTypeCallback</a>.</p>

</div>
</div>
<a id="ga342762351ea237fa26e737d13bcbfcac"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga342762351ea237fa26e737d13bcbfcac">&#9670;&nbsp;</a></span>XDsi_DefaultConfigure()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XDsi_DefaultConfigure </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dsi.html">XDsi</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi_8c.html">xdsi.c</a>&gt;</code></p>

<p>This function will configure protocol reg with video mode, Blank packet mode, Blank packet Type, End of Transmisstion packet. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the <a class="el" href="struct_x_dsi.html" title="The XDsi driver instance data. ">XDsi</a> instance to operate on.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS On enabling the core.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p class="reference">References <a class="el" href="struct_x_dsi.html#a67a8fb9ad74652a0aab81eb036482f9e">XDsi::IsReady</a>.</p>

</div>
</div>
<a id="gaef3bbf8bd7a39e7154eb3ce1129fdda7"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaef3bbf8bd7a39e7154eb3ce1129fdda7">&#9670;&nbsp;</a></span>XDsi_GetConfigParams()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XDsi_GetConfigParams </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dsi.html">XDsi</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_dsi___config_parameters.html">XDsi_ConfigParameters</a> *&#160;</td>
          <td class="paramname"><em>ConfigInfo</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi_8c.html">xdsi.c</a>&gt;</code></p>

<p>This function will get the information from the GUI settings and other protocol control register values like video mode, Blank packet type, Packet Mode, EOTP value. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the <a class="el" href="struct_x_dsi.html" title="The XDsi driver instance data. ">XDsi</a> instance to operate on </td></tr>
    <tr><td class="paramname">ConfigInfo</td><td>is going to be filled up by this function and returned to the caller.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p class="reference">References <a class="el" href="struct_x_dsi___config_parameters.html#a148dc8d5b5992733b8504fc570a15305">XDsi_ConfigParameters::Config</a>, <a class="el" href="struct_x_dsi.html#a63fb2a71fdfd1d2d39a2b8827662b7c4">XDsi::Config</a>, and <a class="el" href="struct_x_dsi___config_parameters.html#a9578d1e50519ec42ad991c9bdd459cc9">XDsi_ConfigParameters::VideoMode</a>.</p>

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<h2 class="memtitle"><span class="permalink"><a href="#ga11eb46d583cc851d5f7746856a7526e7">&#9670;&nbsp;</a></span>XDsi_InterruptClear()</h2>

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          <td class="memname">void XDsi_InterruptClear </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dsi.html">XDsi</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Mask</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__intr_8c.html">xdsi_intr.c</a>&gt;</code></p>

<p>This function will clear the interrupts set in the Interrupt Status Register of the DSI core. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the <a class="el" href="struct_x_dsi.html" title="The XDsi driver instance data. ">XDsi</a> instance to operate on </td></tr>
    <tr><td class="paramname">Mask</td><td>is Interrupt Mask with bits set for corresponding interrupt to be cleared in the Interrupt Status register</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None </dd></dl>

<p class="reference">References <a class="el" href="group__dsi__v1__0.html#ga4eed3e0c901d7b2f8b9cb31f3bc73797">XDSI_IER_ALLINTR_MASK</a>.</p>

<p class="reference">Referenced by <a class="el" href="group__dsi__v1__0.html#ga925b34dea84b254a23db6570082c70fe">XDsi_IntrHandler()</a>.</p>

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<h2 class="memtitle"><span class="permalink"><a href="#gac3e09d98f76b1f93db4ccbf0aa149aa5">&#9670;&nbsp;</a></span>XDsi_InterruptDisable()</h2>

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          <td class="memname">void XDsi_InterruptDisable </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dsi.html">XDsi</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Mask</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__intr_8c.html">xdsi_intr.c</a>&gt;</code></p>

<p>This function will disable the interrupts present in the interrupt mask passed onto the function. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the <a class="el" href="struct_x_dsi.html" title="The XDsi driver instance data. ">XDsi</a> instance to operate on </td></tr>
    <tr><td class="paramname">Mask</td><td>is the interrupt mask which need to be enabled in core</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None </dd></dl>

<p class="reference">References <a class="el" href="group__dsi__v1__0.html#ga4eed3e0c901d7b2f8b9cb31f3bc73797">XDSI_IER_ALLINTR_MASK</a>.</p>

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<h2 class="memtitle"><span class="permalink"><a href="#ga5884ff79a940d84e55fdc7d9fc6be1f7">&#9670;&nbsp;</a></span>XDsi_InterruptEnable()</h2>

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          <td class="memname">void XDsi_InterruptEnable </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dsi.html">XDsi</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Mask</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__intr_8c.html">xdsi_intr.c</a>&gt;</code></p>

<p>This function will enable the interrupts present in the interrupt mask passed onto the function. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the <a class="el" href="struct_x_dsi.html" title="The XDsi driver instance data. ">XDsi</a> instance to operate on </td></tr>
    <tr><td class="paramname">Mask</td><td>is the interrupt mask which need to be enabled in core</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None </dd></dl>

<p class="reference">References <a class="el" href="group__dsi__v1__0.html#ga4eed3e0c901d7b2f8b9cb31f3bc73797">XDSI_IER_ALLINTR_MASK</a>.</p>

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<h2 class="memtitle"><span class="permalink"><a href="#gadbca55f4daff263f50034e122be0f001">&#9670;&nbsp;</a></span>XDsi_InterruptGetEnabled()</h2>

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          <td class="memname">u32 XDsi_InterruptGetEnabled </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dsi.html">XDsi</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi__intr_8c.html">xdsi_intr.c</a>&gt;</code></p>

<p>This function will get the interrupt mask set (enabled) in the DSI core. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the <a class="el" href="struct_x_dsi.html" title="The XDsi driver instance data. ">XDsi</a> instance to operate on</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>Interrupt Mask with bits set for corresponding interrupt in Interrupt enable register</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None </dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga157c4d25d5f085edfb92b638e916a9cd">&#9670;&nbsp;</a></span>XDsi_InterruptGetStatus()</h2>

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          <td class="memname">u32 XDsi_InterruptGetStatus </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dsi.html">XDsi</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p><code>#include &lt;<a class="el" href="xdsi__intr_8c.html">xdsi_intr.c</a>&gt;</code></p>

<p>This function will get the list of interrupts Invoked in the Interrupt Status Register of the DSI core. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the <a class="el" href="struct_x_dsi.html" title="The XDsi driver instance data. ">XDsi</a> instance to operate on</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>Interrupt Mask with bits set for corresponding interrupt in Interrupt Status register</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None </dd></dl>

<p class="reference">Referenced by <a class="el" href="group__dsi__v1__0.html#ga925b34dea84b254a23db6570082c70fe">XDsi_IntrHandler()</a>.</p>

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<h2 class="memtitle"><span class="permalink"><a href="#ga925b34dea84b254a23db6570082c70fe">&#9670;&nbsp;</a></span>XDsi_IntrHandler()</h2>

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          <td class="memname">void XDsi_IntrHandler </td>
          <td>(</td>
          <td class="paramtype">void *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p><code>#include &lt;<a class="el" href="xdsi__intr_8c.html">xdsi_intr.c</a>&gt;</code></p>

<p>This function is the interrupt handler for the DSI core. </p>
<p>This handler reads the Invoked interrupt from the Interrupt Status register determines the source of the interrupts and calls the respective callbacks for the interrupts that are enabled in Interrupt Enable register and finally clears the interrupts.</p>
<p>The application is responsible for connecting this function to the interrupt system. Application beyond this core is also responsible for providing callbacks to handle interrupts and installing the callbacks using <a class="el" href="group__dsi__v1__0.html#ga6e0292fd10d992deb9922469707d8ee7" title="This routine installs an asynchronous callback function for the given HandlerType: ...">XDsi_SetCallback()</a> during initialization phase.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dsi.html" title="The XDsi driver instance data. ">XDsi</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>Interrupt should be enabled to execute interrupt handler. </dd></dl>

<p class="reference">References <a class="el" href="struct_x_dsi.html#aa2734c226ad06d581cfb44252f59bb47">XDsi::CmdQFIFOFullCallback</a>, <a class="el" href="struct_x_dsi.html#ae3335815a8815965de33783fddc52a12">XDsi::CmdQFIFOFullRef</a>, <a class="el" href="struct_x_dsi.html#a67a8fb9ad74652a0aab81eb036482f9e">XDsi::IsReady</a>, <a class="el" href="struct_x_dsi.html#a555240a5dd42150ed0ad44c94ed40604">XDsi::PixelDataUnderrunCallback</a>, <a class="el" href="struct_x_dsi.html#aa47dd5e44096c133f3f60f0fdf62a4bf">XDsi::PixelDataUnderrundRef</a>, <a class="el" href="struct_x_dsi.html#a313f3430a09427242c38ea57efa5447d">XDsi::UnsupportDataTypeRef</a>, <a class="el" href="struct_x_dsi.html#af8b0713407874012d72fb3a0deec7e53">XDsi::UnSupportedDataTypeCallback</a>, <a class="el" href="group__dsi__v1__0.html#ga70eb96c20dcdf636a21fb9140d4798e8">XDSI_IER_CMDQ_FIFO_FULL_MASK</a>, <a class="el" href="group__dsi__v1__0.html#gab30c45469c76c7f5fcd24956466199ed">XDSI_IER_DATA_ID_ERR_MASK</a>, <a class="el" href="group__dsi__v1__0.html#ga73680e01af90788e31e7d4592f6cd600">XDSI_IER_PXL_UNDR_RUN_MASK</a>, <a class="el" href="group__dsi__v1__0.html#ga11eb46d583cc851d5f7746856a7526e7">XDsi_InterruptClear()</a>, and <a class="el" href="group__dsi__v1__0.html#ga157c4d25d5f085edfb92b638e916a9cd">XDsi_InterruptGetStatus()</a>.</p>

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<h2 class="memtitle"><span class="permalink"><a href="#ga51ee9407c1cb984a36e413b3bdb4f9c6">&#9670;&nbsp;</a></span>XDsi_LookupConfig()</h2>

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          <td class="memname"><a class="el" href="struct_x_dsi___config.html">XDsi_Config</a> * XDsi_LookupConfig </td>
          <td>(</td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>DeviceId</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi_8h.html">xdsi.h</a>&gt;</code></p>

<p>Look up the hardware configuration for a device instance. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">DeviceId</td><td>is the unique device ID of the device to lookup for</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The reference to the configuration record in the configuration table (in xdsi_g.c) corresponding to the Device ID or if not found, a NULL pointer is returned.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None </dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga2294e22112b6a7aa5ed1c2714f674f72">&#9670;&nbsp;</a></span>XDsi_Reset()</h2>

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          <td class="memname">void XDsi_Reset </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dsi.html">XDsi</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p><code>#include &lt;<a class="el" href="xdsi_8c.html">xdsi.c</a>&gt;</code></p>

<p>This function will do a reset of the IP. </p>
<p>Register ISR gets reset. Internal FIFO(command queue) gets flushed. FSM stops processing further packets. Controller gracefully ends by waiting for the current sub-block in operation to complete its task and mark next byte as LP byte to end the transfer. Once soft reset is released, controller start from VSS packet. (that is new video frame)</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the <a class="el" href="struct_x_dsi.html" title="The XDsi driver instance data. ">XDsi</a> instance to operate on.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga58a27f9f1a507863325082e43595b4b9">&#9670;&nbsp;</a></span>XDsi_SelfTest()</h2>

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          <td class="memname">u32 XDsi_SelfTest </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dsi.html">XDsi</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi_8h.html">xdsi.h</a>&gt;</code></p>

<p>Runs a self-test on the driver/device. </p>
<p>This test checks if the LaneCount present in register matches the one from the generated file.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dsi.html" title="The XDsi driver instance data. ">XDsi</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if self-test was successful</li>
<li>XST_FAILURE if the read value was not equal to GUI parameter</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None </dd></dl>

<p class="reference">References <a class="el" href="struct_x_dsi.html#a67a8fb9ad74652a0aab81eb036482f9e">XDsi::IsReady</a>.</p>

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<h2 class="memtitle"><span class="permalink"><a href="#gab2cf4f33eff4d4e77d083335025c08f9">&#9670;&nbsp;</a></span>XDsi_SendShortPacket()</h2>

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          <td class="memname">void XDsi_SendShortPacket </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dsi.html">XDsi</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_dsi___short_packet.html">XDsi_ShortPacket</a> *&#160;</td>
          <td class="paramname"><em>ShortPacket</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi_8c.html">xdsi.c</a>&gt;</code></p>

<p>This function will send the short packet to DSI controller Generic Short Packet Register. </p>
<p>Application will fill up this structure and use this API to send short packet</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the <a class="el" href="struct_x_dsi.html" title="The XDsi driver instance data. ">XDsi</a> instance to operate on </td></tr>
    <tr><td class="paramname">ShortPacket</td><td>is going to be filled up by this function and returned to the caller.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p class="reference">References <a class="el" href="struct_x_dsi___short_packet.html#a699b7355c6865a7dee80d2e4ac59ebf4">XDsi_ShortPacket::Data0</a>, <a class="el" href="struct_x_dsi___short_packet.html#a5b56fab1a76f81ae7b4bcf6d0dab46f8">XDsi_ShortPacket::Data1</a>, <a class="el" href="struct_x_dsi___short_packet.html#a31197e6b8434c207d452eb6c8a25c2aa">XDsi_ShortPacket::DataType</a>, <a class="el" href="struct_x_dsi___short_packet.html#aa83630a9b5982b428894d845f68c2825">XDsi_ShortPacket::VcId</a>, <a class="el" href="group__dsi__v1__0.html#gad3423a9a2931ef18ef5698e033aa9da0">XDSI_SPKTR_BYTE1_SHIFT</a>, <a class="el" href="group__dsi__v1__0.html#ga13297e8c2c110f69404cbf9424a468a3">XDSI_SPKTR_BYTE2_SHIFT</a>, and <a class="el" href="group__dsi__v1__0.html#gaceaab8ceddb1f0642bd2429156d1b7ff">XDSI_SPKTR_VC_SHIFT</a>.</p>

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<h2 class="memtitle"><span class="permalink"><a href="#ga6e0292fd10d992deb9922469707d8ee7">&#9670;&nbsp;</a></span>XDsi_SetCallback()</h2>

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          <td class="memname">s32 XDsi_SetCallback </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dsi.html">XDsi</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>HandleType</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">void *&#160;</td>
          <td class="paramname"><em>CallbackFunc</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">void *&#160;</td>
          <td class="paramname"><em>CallbackRef</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p><code>#include &lt;<a class="el" href="xdsi_8h.html">xdsi.h</a>&gt;</code></p>

<p>This routine installs an asynchronous callback function for the given HandlerType: </p>
<pre></pre><pre>HandlerType                     Invoked by this driver when:
-----------------------  --------------------------------------------------
XDSI_HANDLER_UNSUPPORT_DATATYPE Un support data type detected
XDSI_HANDLER_PIXELDATA_UNDERRUN Byte stream FIFO starves for Pixel during
                                  HACT transmission
XDSI_HANDLER_OTHERERROR  Any other type of interrupt has occured like
                           Stream Line Buffer Full, Incorrect Lanes, etc
XDSI_HANDLER_CMDQ_FIFOFULL Command queue FIFO full</pre><pre></pre><dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the <a class="el" href="struct_x_dsi.html" title="The XDsi driver instance data. ">XDsi</a> instance to operate on </td></tr>
    <tr><td class="paramname">HandleType</td><td>is the type of call back to be registered. </td></tr>
    <tr><td class="paramname">CallbackFunc</td><td>is the pointer to a call back funtion which is called when a particular event occurs. </td></tr>
    <tr><td class="paramname">CallbackRef</td><td>is a void pointer to data to be referenced to by the CallbackFunc</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS when handler is installed.</li>
</ul>
</dd></dl>
<ul>
<li>XST_INVALID_PARAM when HandlerType is invalid.</li>
</ul>
<dl class="section note"><dt>Note</dt><dd>Invoking this function for a handler that already has been installed replaces it with the new handler. </dd></dl>

<p class="reference">References <a class="el" href="struct_x_dsi.html#a67a8fb9ad74652a0aab81eb036482f9e">XDsi::IsReady</a>.</p>

</div>
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<a id="gab9519a80289d049534bfbafefdc41c4e"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gab9519a80289d049534bfbafefdc41c4e">&#9670;&nbsp;</a></span>XDsi_SetCustomVideoInterfaceTiming()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">s32 XDsi_SetCustomVideoInterfaceTiming </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dsi.html">XDsi</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__dsi__v1__0.html#ga7931c0f0d26ec1b2bc681f2efe0cf62f">XDsi_VideoMode</a>&#160;</td>
          <td class="paramname"><em>VideoMode</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_dsi___video_timing.html">XDsi_VideoTiming</a> *&#160;</td>
          <td class="paramname"><em>Timing</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi_8c.html">xdsi.c</a>&gt;</code></p>

<p>XDsi_SetCustomVideoInterfaceTiming Set Timning mode and Resolution as per user input. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the <a class="el" href="struct_x_dsi.html" title="The XDsi driver instance data. ">XDsi</a> instance to operate on </td></tr>
    <tr><td class="paramname">VideoMode</td><td>Specifies mode of Interfacing </td></tr>
    <tr><td class="paramname">Timing</td><td>Video Timing parameters</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS is returned if Video interfacing was successfully set.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

</div>
</div>
<a id="gad26d8689133a90687735f528ff96b97d"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gad26d8689133a90687735f528ff96b97d">&#9670;&nbsp;</a></span>XDsi_SetVideoInterfaceTiming()</h2>

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<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">s32 XDsi_SetVideoInterfaceTiming </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dsi.html">XDsi</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__dsi__v1__0.html#ga7931c0f0d26ec1b2bc681f2efe0cf62f">XDsi_VideoMode</a>&#160;</td>
          <td class="paramname"><em>VideoMode</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XVidC_VideoMode&#160;</td>
          <td class="paramname"><em>Resolution</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>BurstPacketSize</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdsi_8c.html">xdsi.c</a>&gt;</code></p>

<p>This function Set Timning mode and Resolution as per that it populate with Peripheral Timing Parameters from the video common library. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the <a class="el" href="struct_x_dsi.html" title="The XDsi driver instance data. ">XDsi</a> instance to operate on </td></tr>
    <tr><td class="paramname">VideoMode</td><td>Specifies mode of Interfacing </td></tr>
    <tr><td class="paramname">Resolution</td><td>sets the resolution </td></tr>
    <tr><td class="paramname">BurstPacketSize</td><td>sets the packet size</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS is returned if Video interfacing was successfully set</li>
<li>XST_FAILURE is returned if TimingMode is not found</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

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